REV. 1.0.0 I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS 2.0 UART INTERNAL REGISTERS The complete register set for" />
參數(shù)資料
型號: XR20M1280IL24-F
廠商: Exar Corporation
文件頁數(shù): 20/63頁
文件大?。?/td> 0K
描述: IC UART I2C/SPI 128 BYTE 24QFN
產(chǎn)品培訓(xùn)模塊: UART Product Overview
XR21V141x Full-Speed USB UART Family
標(biāo)準(zhǔn)包裝: 490
通道數(shù): 1,UART
FIFO's: 128 字節(jié)
規(guī)程: RS485
電源電壓: 1.62 V ~ 3.63 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN 裸露焊盤(4x4)
包裝: 托盤
其它名稱: 1016-1379
XR20M1280
27
REV. 1.0.0
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
2.0 UART INTERNAL REGISTERS
The complete register set for the M1280 is shown in Table 9 and Table 10.
TABLE 9: UART INTERNAL REGISTERS
REGISTER
READ/WRITE
COMMENTS
16C550 COMPATIBLE REGISTERS
0 0 0
DREV - Device Revision
Read-only
LCR[7] = 1, LCR
≠ 0xBF,
DLL = 0x00, DLM = 0x00
0 0 0
DLL - Divisor LSB Register
Read/Write
LCR[7] = 1, LCR
≠ 0xBF
See DLD[7:6]
0 0 1
DLM - Divisor MSB Register
Read/Write
0 1 0
DLD - Divisor Fractional Register
Read/Write
LCR[7] = 1, LCR
≠ 0xBF, EFR[4] = 1
0 0 0
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0 0 1
IER - Interrupt Enable Register
Read/Write
0 1 0
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read-only
Write-only
LCR[7] = 0 if EFR[4] = 1
or
LCR
≠ 0xBF if EFR[4] = 0
0 1 1
LCR - Line Control Register
Read/Write
1 0 0
MCR - Modem Control Register
Read/Write
LCR
≠ 0xBF
1 0 1
LSR - Line Status Register
Read-only
1 0 1
SHR - Setup/Hysteresis Register
Write-only
1 1 0
MSR - Modem Status Register
Read-only
1 1 0
SFR - Special Function Register
Write-only
LCR
≠ 0xBF
EFR[4] = 1
1 1 1
SPR - Scratch Pad Register
Read/Write
LCR
≠ 0xBF, FCTR[6] = 0, SFR[0]=0
1 1 1
EMSR - Enhanced Mode Select Register
Write-only
LCR
≠ 0xBF, FCTR[6] = 1, SFR[0]=0
1 1 1
FC - RX/TX FIFO Level Counter Register
Read-only
ENHANCED REGISTERS
0 0 0
FC - RX/TX FIFO Level Counter Register
Read-only
LCR = 0xBF
0 0 0
TRIG - RX/TX FIFO Trigger Level Register
Write-only
0 0 1
FCTR - Feature Control Register
Read/Write
0 1 0
EFR - Enhanced Function Register
Read/Write
1 0 0
Xon-1 - Xon Character 1
Read/Write
LCR = 0xBF
SFR[0]=0
1 0 1
Xon-2 - Xon Character 2
Read/Write
1 1 0
Xoff-1 - Xoff Character 1
Read/Write
1 1 1
Xoff-2 - Xoff Character 2
Read/Write
1 0 0
GPIOINT - GPIO Interrupt Enable Register
Read/Write
LCR = 0xBF
SFR[0]=1
1 0 1
GPIO3T - GPIO Three-State Control Register
Read/Write
1 1 0
GPIOINV - GPIO Polarity Control Register
Read/Write
1 1 1
GPIOSEL - GPIO Select Register
Read/Write
A2 A1 A0
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