REV. 1.0.0 EMSR[4]: Modem Outputs Three-State Control
參數(shù)資料
型號(hào)： XR20M1280IL24-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 39/63頁(yè)
文件大?。?/td> 0K
描述： IC UART I2C/SPI 128 BYTE 24QFN
產(chǎn)品培訓(xùn)模塊： UART Product Overview
XR21V141x Full-Speed USB UART Family
標(biāo)準(zhǔn)包裝： 490
通道數(shù)： 1，UART
FIFO's： 128 字節(jié)
規(guī)程： RS485
電源電壓： 1.62 V ~ 3.63 V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
安裝類型： 表面貼裝
封裝/外殼： 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 24-QFN 裸露焊盤（4x4）
包裝： 托盤
其它名稱： 1016-1379
XR20M1280
44
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
REV. 1.0.0
EMSR[4]: Modem Outputs Three-State Control
Logic 0 = TX, RTS#, and DTR# outputs are active (default).
Logic 1 = TX, RTS#, and DTR# outputs are in three-state mode.
EMSR[5]: Reserved
This bit is reserved and should be ’0’.
EMSR[6]: LSR Interrupt Mode
Logic 0 = LSR Interrupt Delayed (default). LSR bits 2, 3, and 4 will generate an interrupt when the character
with the error is in the RHR.
Logic 1 = LSR Interrupt Immediate. LSR bits 2, 3, and 4 will generate an interrupt as soon as the character is
received into the FIFO.
EMSR[7]: Xoff/Special character Interrupt Mode Select
This bit selects how the Xoff and Special character interrupt is cleared. The XON interrupt can only be cleared
by reading the ISR register.
Logic 0 = Xoff interrupt is cleared by either reading ISR register or when an XON character is received.
Special character interrupt is cleared by either reading ISR register or when next character is received.
(default).
Logic 1 = Xoff/Special character interrupt can only be cleared by reading the ISR register.
3.15
Baud Rate Generator Registers (DLL, DLM and DLD) - Read/Write
These registers make-up the value of the baud rate divisor. The M1280 has different DLL, DLM and DLD for
transmitter and receiver. It provides more convenience for the transmitter and receiver to transmit data with
different rate. The M1280 uses DLD[7:6] to select TX or RX. Then it provides DLD[5:0] to select the sampling
frequency and fractional baud rate divisor. The concatenation of the contents of DLM and DLL gives the 16-bit
divisor value. The value is added to DLD[3:0]/16 to achieve the fractional baud rate divisor. DLD must be
enabled via EFR bit-4 before it can be accessed. See Table 17 below and See ”Section 1.8, Programmable
DLD[5:4]: Sampling Rate Select
These bits select the data sampling rate. By default, the data sampling rate is 16X. The maximum data rate will
double if the 8X mode is selected and will quadruple if the 4X mode is selected. See Table 17 below.
TABLE 17: SAMPLING RATE SELECT
SAMPLING RATE
0
16X
0
1
8X
1
X
4X
DLD[6]: Independent BRG enable
Logic 0 = The Transmitter and Receiver uses the same Baud Rate Generator. (default).
Logic 1 = The Transmitter and Receiver uses different Baud Rate Generators. Use DLD[7] for selecting
which baud rate generator to configure.
DLD[5]
DLD[4]
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參數(shù)描述
XR20M1280IL24TR-F 功能描述:UART 接口集成電路 1Ch 12C/SPI UART w/ Lvl Shftrs & 4 GPIOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR20M1280IL32-F 功能描述:UART 接口集成電路 1Ch 12C/SPI UART w/ Lvl Shftrs & 8 GPIOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR20M1280IL32TR-F 功能描述:UART 接口集成電路 1Ch 12C/SPI UART w/ Lvl Shftrs & 8 GPIOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR20M1280IL40-F 功能描述:UART 接口集成電路 1Ch 12C/SPI UART w/ Lvl Shftrs & 16GPIOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR20M1280IL40TR-F 功能描述:UART 接口集成電路 1Ch 12C/SPI UART w/ Lvl Shftrs & 16GPIOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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