參數(shù)資料
型號(hào): XR88C92IV-F
廠商: Exar Corporation
文件頁數(shù): 28/32頁
文件大?。?/td> 0K
描述: IC UART FIFO DUAL 44LQFP
標(biāo)準(zhǔn)包裝: 160
特點(diǎn): *
通道數(shù): 2,DUART
FIFO's: 16 字節(jié)
電源電壓: 2.97 V ~ 5.5 V
帶自動(dòng)流量控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應(yīng)商設(shè)備封裝: 44-LQFP(10x10)
包裝: 托盤
XR88C92/192
5
Rev. 1.33
SYMBOL DESCRIPTION (* 44 pin LQFP)
OP5
16
9
O
Multi-purpose output. General purpose output or one of the
following functions can be selected for this output pin by
programming the Output Port Confiuration Register bit 5;
-RxBRDY - Receive ready signal (Open drain output)
-RxBFULL - Receive FIFO full signal (Open drain output)
OP6
29
24
O
Multi-purpose output. General purpose output or Transmit A
holding register empty interrupt (-TxARDY Open drain out-
put).
OP7
17
10
O
Multi-purpose output. General purpose output or Transmit B
holding register empty interrupt (-TxBRDY Open drain output)
A0-A3
2,4,
40,42,
6,7
44,1
I
Address select lines. To select internal registers.
XTAL1
36
30
I
Crystal input 1 or external clock input. A crystal can be
connected between this pin and XTAL2 pin to utilize the
internal oscillator circuit. An external clock can be used to
clock internal circuit and baud rate generator for custom
transmission rates.
XTAL2
37
31
O
Crystal input 2 or buffered clock output. See XTAL1.
GND
22
16,17
Pwr
Signal and power ground.
-INT
24
18
O
Interrupt output (open drain, active low) This pin goes low
upon occurrence of one or more of eight maskable interrupt
conditions (when enabled by the interrupt mask register).
CPU can read the interrupt status register to determine the
interrupting condition(s). This output requires a pull-up resis-
tor.
IP0
8
2
I
Multi-purpose input or Channel A Clear-To-Send (-CTSA
active low).
IP1
5
43
I
Multi-purpose input or Channel B Clear-To-Send (-CTSB
active low).
IP2
40
34
I
Multi-purpose input or Timer/Counter External clock input.
Symbol
Pin
Signal
Pin Description
44
44*
type
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