參數(shù)資料
型號: XRK4991A
廠商: Exar Corporation
英文描述: 3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER
中文描述: 3.3高速(85兆赫)可編程相偏時鐘緩沖器
文件頁數(shù): 11/13頁
文件大?。?/td> 255K
代理商: XRK4991A
xr
REV. P1.0.2
PRELIMINARY
3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER
XRK4991A
11
N
OTES
:
1.
PE: The AC Timing Diagram applies to PE=V
CC
. For PE=GND, the negative edge of FB_IN aligns with the
negative edge of CLKIN, divided outputs change on the negative edge of CLKIN, and the positive edges of the
divide-by-2 and the divide-by-4 signals align.
Skew: The time between the earliest and the latest output transition among all outputs for which the same t
U
delay
has been selected when all are loaded with 20pF and terminated with 75
to V
CC
/2.
t
SKEWPR
: The skew between a pair of outputs (Qx[1:0]) when all eight outputs are selected for 0t
U
.
t
SKEW0
: The skew between outputs when they are selected for 0t
U
.
t
DEV
: The output-to-output skew between any two devices operating under the same conditions (VCC, ambient
temperature, air flow, etc.)
t
ODCV
: The deviation of the output from a 50% duty cycle. Output pulse width variations are included in t
SKEW2
and
t
SKEW4
specifications.
t
PWH
is measured at 2V.
t
PWL
is measured at 0.8V.
t
ORISE
and t
OFALL
are measured between 0.8V and 2V.
t
LOCK
: The time that is required before synchronization is achieved. This specification is valid only after V
CC
is
stable and within normal operating limits. This parameter is measured from the application of a new signal or
frequency at CLKIN or FB_IN until t
PD
is within specified limits.
2.
3.
4.
5.
6.
7.
8.
9.
10.
F
IGURE
5. AC T
IMING
D
IAGRAM
CLKIN
FB_IN
Any Q
OTHER Q
INVERTED Q
CLKIN DIVIDED BY 2
t
REF
t
RPWH
t
RPWL
t
PD
t
ODCV
t
ODCV
t
JR
t
SKEWPR,
t
SKEW0, 1
t
SKEWPR,
t
SKEW0, 1
t
SKEW2
t
SKEW2
CLKIN DIVIDED BY 4
t
SKEW3, 4
t
SKEW3, 4
t
SKEW3, 4
t
SKEW1, 3, 4
t
SKEW2, 4
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