參數(shù)資料
型號(hào): XRK4991A
廠商: Exar Corporation
英文描述: 3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER
中文描述: 3.3高速(85兆赫)可編程相偏時(shí)鐘緩沖器
文件頁數(shù): 6/13頁
文件大?。?/td> 255K
代理商: XRK4991A
XRK4991A
3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER
PRELIMINARY
xr
REV. P1.0.2
6
N
OTES
:
4.
FB_IN connected to an output selected for "zero" skew (i.e. SELx1 = SELx0 = MID).
TEST MODE
The TEST input is a three-level input. In normal system operation, this pin is connected to ground, allowing the
XRK4991 to operate as explained briefly above (for testing purposes, any of the three-level inputs can have a
removable jumper to ground, or be tied LOW through a 100
resistor. This will allow an external tester to
change the state of these pins.)
If the TEST input is forced to its MID or HIGH state, the device will operate with its internal phase locked loop
disconnected, and input levels supplied to CLKIN will directly control all outputs. Relative output to output
functions are the same as in normal mode.
In contrast with normal operation (TEST tied LOW). All outputs will function based only on the connection of
their own function select inputs (SELx[1:0]) and the waveform characteristics.
F
IGURE
3. T
YPICAL
O
UTPUTS
WITH
FB_IN C
ONNECTED
TO
A
Z
ERO
-S
KEW
O
UTPUT
[4]
(N/A)
LL
LM
LH
ML
MM
MH
HL
HM
HH
(N/A)
(N/A)
LM
LH
(N/A)
ML
(N/A)
MM
(N/A)
MH
(N/A)
HL
HM
LL/HH
(N/A)
HH
-6t
U
-4t
U
-3t
U
-2t
U
-1t
U
0t
U
+1t
U
+2t
U
+3t
U
+4t
U
+6t
U
DIVIDED
INVERT
SELA-QA[1:0] SELC-QC[1:0]
SELB-QB[1:0] SELD-QD[1:0]
FB_IN
CLKIN
t
0
-
U
t
0
-
U
t
0
-
U
t
0
-
U
t
0
-
U
t
0
-
U
t
0
t
0
+
U
t
0
+
U
t
0
+
U
t
0
+
U
t
0
+
U
t
0
+
U
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