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參數(shù)資料
| 型號： | XRK4993IR-2 |
| 廠商： | EXAR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 3.3V PROGRAMMABLE SKEW CLOCK BUFFER |
| 中文描述： | 4993 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.150 INCH, QSOP-28 |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 95K |
| 代理商： | XRK4993IR-2 |
XRK4993
11
REV. 1.0.0
3.3V PROGRAMMABLE SKEW CLOCK BUFFER
PE = L
OW
T
IMING
:
All output changes occur on the falling edge of the Clkin reference signal. Programmable skews are made
relative to this edge.
PE=H
IGH
T
IMING
:
When the PE pin is High, all changes begin relative to the rising edge of the Clkin reference signal. This
includes not only the "zero tu" signals but also the divided output signals. The divided-by-two outputs will
change on each rising edge. As QD can only be 0tu, QC is the only "divide by" output providing either divide-
by- two or divide-by-four, not both.
F
IGURE
7. T
IMING
D
IAGRAM
PE=L
OW
F
IGURE
8. T
IMING
D
IAGRAM
PE=H
IGH
Clkin
FB_In
Qxn
QC div2
QC div4
Clkin
FB_In
Qxn
QC div2
QC div4
相關PDF資料 |
PDF描述 |
|---|---|
| XRK4993IR-5 | 3.3V PROGRAMMABLE SKEW CLOCK BUFFER |
| XRK69772 | 1:12 LVCMOS PLL CLOCK GENERATOR |
| XRK69772CR | 1:12 LVCMOS PLL CLOCK GENERATOR |
| XRK69772IR | 1:12 LVCMOS PLL CLOCK GENERATOR |
| XRK69773 | 1:12 LVCMOS PLL CLOCK GENERATOR |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRK4993IR-5 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3.3V PROGRAMMABLE SKEW CLOCK BUFFER |
| XRK4993IR-7 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3.3V PROGRAMMABLE SKEW CLOCK BUFFER |
| XRK69772 | 制造商:EXAR 制造商全稱:EXAR 功能描述:1:12 LVCMOS PLL CLOCK GENERATOR |
| XRK69772CR | 制造商:EXAR 制造商全稱:EXAR 功能描述:1:12 LVCMOS PLL CLOCK GENERATOR |
| XRK69772IR | 制造商:EXAR 制造商全稱:EXAR 功能描述:1:12 LVCMOS PLL CLOCK GENERATOR |
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