參數(shù)資料
型號: XRT16L2552
廠商: Exar Corporation
英文描述: 2.25V TO 5.5V DUART WITH 16-BYTE FIFO
中文描述: 2.25V至5.5V的杜阿爾特16字節(jié)FIFO
文件頁數(shù): 31/47頁
文件大小: 413K
代理商: XRT16L2552
xr
REV. 1.1.1
XR16L2552
2.25V TO 5.5V DUART WITH 16-BYTE FIFO
31
MSR[1]: Delta DSR# Input Flag
Logic 0 = No change on DSR# input (default).
Logic 1 = The DSR# input has changed state since the last time it was monitored. A modem status interrupt
will be generated if MSR interrupt is enabled (IER bit-3).
MSR[2]: Delta RI# Input Flag
Logic 0 = No change on RI# input (default).
Logic 1 = The RI# input has changed from a logic 0 to a logic 1, ending of the ringing signal. A modem status
interrupt will be generated if MSR interrupt is enabled (IER bit-3).
MSR[3]: Delta CD# Input Flag
Logic 0 = No change on CD# input (default).
Logic 1 = Indicates that the CD# input has changed state since the last time it was monitored. A modem
status interrupt will be generated if MSR interrupt is enabled (IER bit-3).
MSR[4]: CTS Input Status
Normally this bit is the compliment of the CTS# input. However in the loopback mode, this bit is equivalent to
the RTS# bit in the MCR register. The CTS# input may be used as a general purpose input when the modem
interface is not used.
MSR[5]: DSR Input Status
Normally this bit is the compliment of the DSR# input. In the loopback mode, this bit is equivalent to the DTR#
bit in the MCR register. The DSR# input may be used as a general purpose input when the modem interface is
not used.
MSR[6]: RI Input Status
Normally this bit is the compliment of the RI# input. In the loopback mode this bit is equivalent to bit-2 in the
MCR register. The RI# input may be used as a general purpose input when the modem interface is not used.
MSR[7]: CD Input Status
Normally this bit is the compliment of the CD# input. In the loopback mode this bit is equivalent to bit-3 in the
MCR register. The CD# input may be used as a general purpose input when the modem interface is not used.
4.11
Scratch Pad Register (SPR) - Read/Write
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
4.12
Baud Rate Generator Registers (DLL and DLM) - Read/Write
The concatenation of the contents of DLM and DLL gives the 16-bit divisor value which is used to calculate the
baud rate:
Baud Rate = (Clock Frequency / 16) / Divisor
See MCR bit-7 and the baud rate table also.
4.13
Alternate Function Register (AFR) - Read/Write
This register is used to select specific modes of MF# operation and to allow both UART register sets to be
written concurrently.
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