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| 型號： | XRT4500 |
| 廠商： | Exar Corporation |
| 英文描述： | MULTIPROTOCOL SERIAL NETWORK INTERFACE IC |
| 中文描述： | 多協(xié)議串行網(wǎng)絡(luò)接口芯片 |
| 文件頁數(shù)： | 50/99頁 |
| 文件大小： | 1384K |
| 代理商： | XRT4500 |
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á
XRT4500
MULTIPROTOCOL SERIAL NETWORK INTERFACE IC
REV. 1.0.7
47
Figure 27 indicates that the DTE Serial Communica-
tions Controller (SCC) sources the “TXD” signal. This
digital signal is then converted into an “Analog Line”
signal (as dictated by the “M[2:0]” settings) by the
“DTE Mode” XRT4500. This line signal is then trans-
mitted over the DTE/DCE Interface and is received by
the DCE Terminal. This Analog Line signal is then
converted back into the digital format by the “DCE
Mode” XRT4500. This digital signal is ultimately re-
ceived and terminated by the DCE SCC (Serial Com-
munications Controller). Likewise, this figure indicates
that the RXD signal is sourced by the DCE SCC. This
digital signal is then converted into an “Analog Line”
signal by the “DCE Mode” XRT4500. This line signal is
then transported over the DCE/DTE Interface and is re-
ceived by the “DTE Mode” XRT4500. This “Analog Line
signal” is then converted back into the digital format by
the “DTE Mode” XRT4500. The XRT4500 then outputs
this signal to the “DTE SCC”. This is considered to the
be the “Normal” (Non-loop-back/Diagnostic) Mode of
operation.
N
OTE
:
Figure 27 only depicts the “High-Speed” DCE/DTE
Interface signals. The “Low-Speed” control/handshaking
signals are not affected by the loop-back mode.
Behavior of the DTE Mode XRT4500, when the
Loop-Back Mode is Enabled.
Figure 18 presents an illustration of a DTE and a
DCE Terminal interfaced to each other. In this case,
the XRT4500 (associated with the DTE Terminal) has
been configured to operate in the “Loop-back” Mode
N
OTE
:
Figure 18 only depicts the “High-Speed” signals.
The “Low-Speed” control/handshaking signals are not
affected by the loop-back mode.
If the Loop-back Mode is configured within the
XRT4500, while it is operating in the DTE Mode, then
the following two (2) loop-back paths will exist.
A Digital/Terminal-Side Loop-back
An Analog/Line-Side Loop-back
Each of these Loop-back paths are described below.
1. The Digital/Terminal Side Loop-back path:
This loop-back path is referred to as a “Digital/Termi-
nal Side” Loop-back, because all signals originate
from and are terminated by the DTE SCC (e.g., the
Terminal Equipment). The signals (from the DTE
SCC) are never converted into the Analog format,
and are not outputted to the line.
The TXD signal (originating from the DTE SCC),
along with the SCTE (Transmit Echo Clock) will be not
be outputted to the DCE Terminal. Instead, this signal
will be loop-back into the “DTE SCC. The “TXD” sig-
nal will ultimately be outputted to the DTE SCC via
the “RXD” output pin of the “DTE Mode” XRT4500.
The SCTE signal will ultimately output the DTE SCC
via the “RXC” output pin of the XRT4500.
N
OTE
:
Since the DTE SCC requires the TXC signal (in
order to synthesize the SCTE signal), this loop-back still
permits the TXC signal to pass through to the DTE SCC.
F
IGURE
18. I
LLUSTRATION
OF
THE
B
EHAVIOR
THE
DTE M
ODE
XRT4500,
WHEN
IT
IS
CONFIGURED
TO
OPERATE
IN
THE
L
OOP
-B
ACK
M
ODE
SCC (R)
SCC (L)
XRT4500
XRT4500
RX1
TX1
RX2
TX2
RX3
TX3
RX2
TX2
RX1
TX1
RXD
RXC
TXC
SCTE_IN
TXD_IN
TXD
SCTE
TXC_IN
RXC_IN
RXD_IN
60
67
73
74
1
78
79
71
77
70
71
64
65
63
62
1
74
68
67
60
63
62
64
65
70
71
77
76
78
79
TXD
SCTE
TXC
RXC
RXD
Digital/Terminal
Loop-back Path
Analog/Line
Loop-back Path
MUX 1
DCE (#2)
DTE (#3)
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PDF描述 |
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| XRT4500CV | MULTIPROTOCOL SERIAL NETWORK INTERFACE IC |
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| XRT5794ES | Evaluation System |
| XRT5894ES | () |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT4500CV | 制造商:EXAR 制造商全稱:EXAR 功能描述:MULTIPROTOCOL SERIAL NETWORK INTERFACE IC |
| XR-T5600P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Repeater |
| XR-T56188CD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Transceiver |
| XR-T56188CP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Transceiver |
| XR-T56188ID | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Transceiver |
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