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參數(shù)資料
| 型號： | XRT5997IVTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 36/37頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E1 7CH 3.3V 100TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 7/7 |
| 規(guī)程： | E1 |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | XRT5997IVTR-F-ND |
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XRT5997
8
Rev. 1.0.0
Pin#
Symbol
Type
Description
34
RxNEG2
O
Receiver 2 Negative Data Out:
This output pin will pulse “high” whenever Channel 2, within the XRT5997
device has received a “Negative Polarity” pulse, in the incoming line signal,
at RTIP2/RRing2 inputs.
35
RxPOS2
O
Receiver 2 Positive Data Out:
This output pin will pulse “high” whenever Channel 2, within the XRT5997
device has received a “Positive Polarity” pulse, in the incoming line signal, at
RTIP2/RRing2 inputs.
36
LOS2
O
Receiver 2 Loss of Signal:
This output pin toggles “high” if Channel 2, within the XRT5997 device has
detected a “Loss of Signal” condition in the incoming line signal.
37
DVDD
-
Positive Supply (+3.3V ± 5%). Digital Circuitry.
38
DVDD
-
Positive Supply (+3.3V ± 5%). Digital Circuitry.
39
DGND
-
Digital Ground: Digital Circuitry.
40
LOS5
O
Receiver 5 Loss of Signal:
This output pin toggles “high” if Channel 5, within the XRT5997 device has
detected a “Loss of Signal” condition in the incoming line signal.
Note: 1Internally pull-up with 50K resistor
41
RxPOS5
O
Receiver 5 Positive Data Out:
This output pin will pulse “high” whenever Channel 5, within the XRT5997
device has received a “Positive Polarity” pulse, in the incoming line signal, at
RTIP5/RRing5 inputs.
42
RxNEG5
O
Receiver 5 Negative Data Out:
This output pin will pulse “high” whenever Channel 5, within the XRT5997
device has received a “Negative Polarity” pulse, in the incoming line signal,
at RTIP5/RRing5 inputs.
43
TxClk5
I
Transmitter Clock Input – Channel 5:
If the user operates Channel 5 (within the XRT5997 device) in the “clocked”
mode, then the “Transmit Section” of the Channel 5 will use the falling edge of
this signal to sample the data at the TxPOS5 and TxNEG5 input pins.
NOTE: If the user operates the Channel 5 in the “clockless” mode, then the
Terminal Equipment should not apply a clock signal to this input pin.
PIN DESCRIPTION (CONT'D)
Note: 1 Internally pull-up with 50K resistor.
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