Test Conditions: VDD = 5V $10%, T
參數(shù)資料
型號: XRT6166CDTR-F
廠商: Exar Corporation
文件頁數(shù): 11/15頁
文件大小: 0K
描述: IC DGTL DATA PROCESSOR 28SOIC
產(chǎn)品變化通告: Packaging Change 15/Jul/2010
標準包裝: 1,000
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: E1
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 28-SOIC
包裝: 帶卷 (TR)
XR-T6166
5
Rev. 2.03
ELECTRICAL CHARACTERISTICS
Test Conditions: VDD = 5V $10%, TA = 25°C, Unless Otherwise Specified
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
DC Electrical Characteristics
VIH
Logic 1
2.4
V
VIL
Logic 0
0.4
V
VDD
Supply
4.5
5.5
V
IDD
Supply Current
500
A
Dynamic Supply Current
IIL
Input Leakage
1
A
VOL
0.4
V
At 1.6mA
VOH
2.4
mA
At 0.4mA
AC Electrical Characteristics
General
tr, tf
Output Rise/Fall Time
20
ns
All Outputs
Receiver
tRS
RX2MHz Rising Edge to TS
Rising Edge Set Up Time
0
tRXL-
100
ns
Figure 3
tRH
RX2MHz Rising Edge to TS
Falling Edge Hold Time
0
tRXL-
100
ns
Figure 3
tDRS
TS Rising Edge to Leading Edge
of PCMOUT D0 Bit Delay
10
ns
Figure 3
tDRH
TS Falling Edge to Trailing Edge
of PCMOUT D7 Bit Hold Time
0
10
ns
Figure 3
tRXD
RX2MHz Rising Egde to
PCMOUT Bits D1 Through D6
Rising Edge Delay
10
ns
Figure 3
tPW
PCMOUT Pulse Width
488
ns
Figure 3
tRXH
RX2MHz High Time
244
ns
Figure 3
tRXL
RX2MHz Low Time
244
ns
Figure 3
tRXCLK
RX2MHz Period
488
ns
$100ppm
Transmitter
tTS
TS Rising Edge to TX2MHz Set
Up Time
20
tTXL-
100
ns
Figure 5
tTH
TS Falling Edge to TX2MHz Hold
Time
0
tTXL-
100
ns
Figure 5
tDS
PCMIN Edge to TX2MHz Set Up
Time
100
ns
Figure 5
tDH
PCMIN Edge to TX2MHz Hold
Time
100
ns
Figure 5
tTXH
TX2MHz High Time
244
ns
Figure 5
tTXL
TX2MHz Low Time
244
ns
Figure 5
tTXCLK
TX2MHz Period
488
ns
$100ppm
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