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參數(shù)資料
| 型號： | XRT6166CDTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 15/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL DATA PROCESSOR 28SOIC |
| 產(chǎn)品變化通告： | Packaging Change 15/Jul/2010 |
| 標準包裝： | 1,000 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | E1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應商設(shè)備封裝： | 28-SOIC |
| 包裝： | 帶卷 (TR) |
XR-T6166
9
Rev. 2.03
time-slot signal is high. A two input multiplexer at the
time-slot input allows the receiver to be hard wired to two
time-slot positions. time-slot signals are applied to TS1R
(pin 23) and TS2R (pin 24) and the active time-slot is
selected by R TSEL (pin 27). A high level applied to
RTSEL selects TS1R and a low level selects TS2R. Data
appearing at PCMOUT is framed by the read time-slot
signal and is guaranteed glitch free.
Recovery of the 128kHz timing signal is performed by a
variable length counter which is clocked by the 2.048MHz
signal applied to RXCK2MHz (pin 9). This clock is not
required to be synchronized with any other signals that
are applied to the XR-T6166. However , the RX2MHz
clock may also be used for this function. Positive input
data transitions are used to synchronize this counter with
the data. If synchronization is lost, the counter length is
shortened, and the clock recovery circuit enters a seek
mode until a transition is found. This mode is identified by
a high level at the CS output (pin 22). The extracted
128kHz signal is available at RXCKOUT (pin 7).
Octet timing ensures that bit grouping is maintained when
the data is converted from a 64kbps continuous stream to
eight bit 2.048Mbps bursts. Bipolar violations are used to
identify the last bit in each eight bit octet. In the absence of
these violations, for example when receiving a
transmitted alarm condition (transmitter ALARMIN is
high), the circuit will continue to operate in
synchronization with respect to the last received violation.
During this time, the data present at PCMOUT is
still
correct as long as synchronization based on the last
received violation is still valid, and the BLS input (pin 4) is
held high. However , if BLS is low and an octet timing
violation is not received, receiver output data is blanked
by forcing PCMOUT to a high level. Also, if eight
successive octet timing violations are not received, the
ALARM output (pin 1) goes to a high level. A high level
applied to the BLANK input (pin 6) will also force
PCMOUT to an all-ones state.
Slip control logic is included in the receiver to
accommodate rate differences between input and output
data. The 64kbps input rate is determined by the remote
transmitter, while the PCMOUT rate is set by RX2MHz
which is a local clock. If thisclock is slow, an octet will be
deleted periodically, while the last octet will be repeated
under fast conditions. Octet timing is maintained during
these operations. Outputs are provided to indicate when
an octet is inserted or deleted. The BIR flag (pin 26) is
high when PCMOUT data is repeated, and the BDR flag
(pin 25) is high when the receiver deletes an octet.
APPLICATION INFORMATION
64kbps Codirectional Interface
Figure 7 shows a codirectional interface circuit using the
XR-T6166 with the XR-T6164 line interface. The
XR-T6164 first converts the bipolar 64kbps transmit and
receive signals to active-low TTL compatible data
required by the XR-T6166. The XR-T6166 then performs
the digital functions that are necessary to interface this
64kbps continuous data to a 2.048Mbps PCM time-slot.
The 64kbps signals that have been attenuated and
distorted by the twisted pair cable are
transformer-coupled to the line side of the XR-T6164 as
shown on the left side of
Figure 7. A
suggested
transformer for both the input and output applications is
the pulse type PE-65535.
The right side of
Figure 7 shows the XR-T6164 LOS (Loss
of Signal) output and the XR-T6166 digital inputs and
outputs. All of these pins are TTL compatible. Please
refer to the Pin Description section of this data sheet for
detailed information about each signal.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR-T6166CP | 制造商:EXAR 制造商全稱:EXAR 功能描述:Codirectional Digital Data Processor |
| XRT6166CP-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XR-T6166ID | 制造商:EXAR 制造商全稱:EXAR 功能描述:Codirectional Digital Data Processor |
| XRT6166ID-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XR-T6166IP | 制造商:EXAR 制造商全稱:EXAR 功能描述:Codirectional Digital Data Processor |
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