- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9084 > XRT71D00IQTR-F (Exar Corporation)IC JITTER ATTENUATOR SGL 32TQFP PDF資料下載
參數(shù)資料
| 型號： | XRT71D00IQTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 24/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC JITTER ATTENUATOR SGL 32TQFP |
| 標準包裝： | 1,500 |
| 類型： | * |
| PLL： | 是 |
| 輸入： | 時鐘 |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:2 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 44.736MHz |
| 除法器/乘法器： | 無/無 |
| 電源電壓： | 3.135 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（7x7） |
| 包裝： | 帶卷 (TR) |
á
XRT71D00
E3/DS3/STS-1 JITTER ATTENUATOR
REV. 1.2.0
6
12
HOST/HW
I
Host/Hardware Mode Select:
This input pin permits the user to configure the XRT71D00 device to operate in either
the “Host” or “Hardware” Mode.
Setting this input pin “high” configures the XRT71D00 device to operate in the “Host”
Mode (e.g., enables the Microprocessor Serial Interface). In this mode, the user is
expected to configure the XRT71D00 device by writing data into the “on-chip” Com-
mand Registers via the Microprocessor Serial Interface. As a consequence, when the
XRT71D00 device is operating in the “Host” Mode, then it will ignore the states of many
of the discrete input pins.
Setting this input pin “l(fā)ow” configures the XRT71D00 device to operate in the “Hard-
ware” Mode. When the XRT71D00 device is operating in the “Hardware” Mode, then
the Microprocessor Serial Interface will be disabled. In this mode, many of the external
input control pins will be functional.
13
NC
***
This pin is not connected internally.
14
FL
O
FIFO Limit Alarm Output Indicator.
This output pin is driven high whenever the internal FIFO comes within two-bits of
being completely full or completely depleted.
When this output pin is asserted, it will be driven “high” for at least one “RRCLK” cycle
period.
15
BWS/
Ch_Addr_1
I
Bandwidth Select Input/Channel Addr_1 Assignment Input. The function of
this input pin depends on whether XRT71D00 is configured in Host or Hardware mode.
Hardware Mode—Bandwidth Select Input:
This input pin permits the user to configure the PLL (within the XRT71D00 device) to
operate with either a wide or narrow bandwidth. Setting this input pin “high” configures
the PLL to operate with a wide bandwidth
Conversely, setting this input pin “l(fā)ow” configures the PLL to operate with a “narrow-
bandwidth”.
Host Mode—Channel_Addr_1 Assignment Input:
This input pin, along with pin 28 permits the user to assign a “Channel Address” to the
XRT71D00 device.
NOTE: A detailed discussion on “Channel Assignment” is presented in Section _.
16
NC
***
This pin is not connected internally.
17
NC
***
This pin is not connected internally.
PIN DESCRIPTION
PIN #NAME
TYPE
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X9421WV14I-2.7T1 | IC XDCP SGL 64-TAP 10K 14-TSSOP |
| X9421WV14-2.7T1 | IC XDCP SGL 64-TAP 10K 14-TSSOP |
| SY89536LHZ | IC SYNTHESIZR LVPECL/HSTL 64TQFP |
| VI-253-MW-S | CONVERTER MOD DC/DC 24V 100W |
| V28A5H175B | CONVERTER MOD DC/DC 5V 175W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT71D03 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR |
| XRT71D03ES | 功能描述:時鐘合成器/抖動清除器 3CH T3/E3JA w/T73LC03A RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT71D03IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR |
| XRT71D03IV-F | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT71D03IVTR-F | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。