- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376460 > XRT71D03 (EXAR CORP) 3-Channel E3/DS3/STS-1 Jitter Attenuator,STS-1 to DS3 Desynchronizer(達到E3/DS3/STS-1振蕩要求的3通道振蕩衰減器) PDF資料下載
參數(shù)資料
| 型號： | XRT71D03 |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 3-Channel E3/DS3/STS-1 Jitter Attenuator,STS-1 to DS3 Desynchronizer(達到E3/DS3/STS-1振蕩要求的3通道振蕩衰減器) |
| 中文描述： | DATACOM, PCM JITTER ATTENUATOR, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, LQFP-64 |
| 文件頁數(shù)： | 11/20頁 |
| 文件大?。?/td> | 210K |
| 代理商： | XRT71D03 |
á
XRT71D03
3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER
PRELIMINARY
REV. P1.0.2
11
The XRT71D03 DS3/E3 Jitter Attenuator IC consists
of the following functional blocks:
Timing Control Block
The Jitter-Attenuator PLL
The 2-Channel 16/32 Bit FIFO.
BACKGROUND INFORMATION:
DEFINITION OF JITTER
One of the most important and least understood mea-
sures of clock performance is jitter. The International
Telecommunication Union defines jitter as short term
variations of the significant instants of a digita signal
from their ideal positions in time. Jitter can occur due
to any of the following:
1) Imperfect timing recovery circuit in the system
2) Cross-talk noise
3) Inter-symbol interference/Signal Distortion
SONET STS-1 to DS3 MAPPING
SONET equipment jitter criteria are specified as:
i) Jitter Transfer
ii) Jitter Tolerance
iii) Jitter Generation
JITTER TRANSFER CHARACTERISTICS:
The primary purpose of jitter transfer requirements is
to prevent performance degradations by limiting the
accummulation of jitter through the system such that
it does not exceed the network interface jitter require-
ments. Thus, it is more important that a system meet
the jitter transfer criteria for relatively high input jitter
amplitudes. The jitter transferred through the system
must be under the jitter mask for any input jitter ampli-
tude within the range as shown in Figure 5
F
IGURE
4. I
LLUSTRATION
OF
OF
A
TYPICAL
C
HANNEL
-
N
OF
THE
XRT71D03 (
CONFIGURED
TO
OPERATE
IN
THE
H
OST
M
ODE
)
HOST
RST
16/32 Bit FIFO
Microprocessor Serial
Interface
Timing Control Block /
Phase locked Loop
Write Clock
Read Clock
RRCLKn
RRPOSn
RRNEGn
RRCLKES
FLn
RCLKn
RPOSn
RNEGn
ICT
CS SDI SDO SClk
MClkn
Smoothed
Clock
Jittery
Clock
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT71D04 | 4-Channel E3/DS3/STS-1 Jitter Attenuator,STS-1 to DS3 Desynchronizer(達到E3/DS3/STS-1振蕩要求的4通道振蕩衰減器) |
| XRT7234 | E3 ATM User Network Interface(E3異步傳輸模式用戶網(wǎng)絡(luò)接口) |
| XRT7245 | DS3 ATM User Network Interface(DS3異步傳輸模式用戶網(wǎng)絡(luò)接口) |
| XRT7288IP | CEPT1 Line Interface |
| XRT7288 | CEPT1 Line Interface(CEPT1線接口) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT71D03ES | 功能描述:時鐘合成器/抖動清除器 3CH T3/E3JA w/T73LC03A RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT71D03IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR |
| XRT71D03IV-F | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT71D03IVTR-F | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT71D04 | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。