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參數(shù)資料
| 型號： | XRT73L02M |
| 廠商： | Exar Corporation |
| 英文描述： | TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| 中文描述： | 雙通道E3/DS3/STS-1線路接口單元 |
| 文件頁數(shù)： | 42/46頁 |
| 文件大小： | 391K |
| 代理商： | XRT73L02M |
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XRT73L02M
xr
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.0
40
8.0
DIAGNOSTIC FEATURES:
8.1
PRBS G
ENERATOR
AND
D
ETECTOR
:
The XRT73L02M contains an on-chip Pseudo Random Binary Sequence (PRBS) generator and detector for
diagnostic purpose. This feature is only available in Host mode. With the PRBSEN_n bit = “1”, the transmitter
will send out PRBS of 2
23
-1 in E3 rate or 2
15
-1 in STS-1/DS3 rate. At the same time, the receiver PRBS detec-
tor is also enabled. When the correct PRBS pattern is detected by the receiver, the RNEG/LCV pin will go
“Low” to indicate PRBS synchronization has been achieved. When the PRBS detector is not in sync the PRB-
SLS bit will be set to “1” and RNEG/LCV pin will go “High”.
With the PRBS mode enabled, the user can also insert a single bit error by toggling “INSPRBS” bit. This is
done by writing a “1” to INSPRBS bit. The receiver at RNEG/LCV pin will pulse “High” for one RxClk cycle for
every bit error detected. Any subsequent single bit error insertion must be done by first writing a “0” to IN-
SPRBS bit and followed by a “1”.
Figure 25 shows the status of RNEG/LCV pin when the XRT73L02M is configured in PRBS mode.
N
OTE
:
In PRBS mode, the device is forced to operate in Single-Rail Mode.
8.2
LOOPBACKS:
The XRT73L02M offers three loop back modes for diagnostic purposes. In Hardware mode, the loop back
modes are selected via the RLB_n and LLB_n pins. In Host mode, the RLB_n and LLB_n bits n the Channel
control registers select the loop back modes.
8.2.1
In this mode, the transmitter outputs (TTIP_n and TRING_n) are connected internally to the receiver inputs
(RTIP_n and RRING_n) as shown in Figure 26. Data and clock are output at RCLK_n, RPOS_n and RNEG_n
pins for the corresponding transceiver. Analog loop back exercises most of the functional blocks of the device
including the jitter attenuator which can be selected in either the transmit or receive path.
XRT73L02M can be configured in Analog Loopback either in Hardware mode via the LLB_n and RLB_n pins or
in Host mode via LLB_n and RLB_n bits in the channel control registers.
ANALOG LOOPBACK:
N
OTES
:
1. In the Analog loopback mode, data is also output via TTIP_n and TRING_n pins.
2. Signals on the RTIP_n and RRING_n pins are ignored during analog loop back.
F
IGURE
24. PRBS MODE
RClk
RNEG/LCV
SYNC LOSS
PRBS SYNC
Single Bit Error
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT73L02MIV | TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L02 | 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元) |
| XRT73L03A | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L03AIV | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L03B | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73L02MES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73L02MIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L02MIV-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT73L02MIVTR-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73L03 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3 CHANNEL E3/DS3/STS-1 LINE INTERFCE UNIT |
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