參數(shù)資料
型號(hào): XRT73L04A
廠商: Exar Corporation
英文描述: 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
中文描述: 4通道DS3/E3/STS-1線路接口單元
文件頁數(shù): 33/65頁
文件大?。?/td> 366K
代理商: XRT73L04A
XRT73L04A
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 2.0.3
29
TxClk_(n) is the clock signal that is of the selected
data rate frequency, E3 = 34.368 MHz, DS3 = 44.736
MHz and STS-1 = 51.84 MHz. If the Transmit Section
samples a "1" on the TPData_(n) input pin, then the
Transmit Section of the device generates a positive
polarity pulse via the TTIP_(n) and TRing_(n) output
pins across a 1:1 transformer. If the Transmit Section
samples a "1" on the TNData_(n) input pin, then the
Transmit Section of the device generates a negative
polarity pulse via the TTIP_(n) and TRing_(n) output
pins across a 1:1 transformer.
2.1.2
Accepting Single-Rail Data from the Ter-
minal Equipment
To transmit data in a Single-Rail data from the Termi-
nal Equipment, configure the XRT73L04A in the
HOST Mode.
To Configure Channel(n) to accept Single-Rail Da-
ta from the Terminal Equipment:
Write a "1" into the (SR/DR)_(n) bit-field, within Com-
mand Register CR3-(n) shown below. (Please refer
toTable 2 for the Address of the individual (n) chan-
nel.
The Transmit Section (of each channel) samples this
input pin on the falling edge of the TxClk_(n) clock
signal and encodes this data into the appropriate bi-
polar line signal across the TTIP_(n) and TRing_(n)
output pins.
N
OTES
:
1. In this mode, the Transmit Logic Block ignores the
TNData_(n) input pin.
2. If the Transmit Section of a given channel is config-
ured to accept Single-Rail data from the Terminal
Equipment, the B3ZS/HDB3 Encoder must be
enabled.
Figure 16 Illustrates the behavior of the TPData_(n)
and TxClk_(n) signals when the Transmit Logic Block
has been configured to accept Single-Rail data from
the Terminal Equipment.
2.2
T
HE
T
RANSMIT
C
LOCK
D
UTY
C
YCLE
A
DJUST
C
IR
-
CUITRY
The on-chip Pulse-Shaping circuitry within the Trans-
mit Section of each Channel in the XRT73L04A gen-
erates pulses of the appropriate shapes and width to
F
IGURE
15. T
HE
XRT73L04A S
AMPLES
THE
DATA
ON
THE
TPD
ATA
AND
TND
ATA
INPUT
PINS
TxClk
TPData
TNData
Data 1 1 0
COMMAND REGISTER CR3-(n)
D4
D3
D2
D1
D0
(SR/DR)_(n) LOSMUT_(n) RxOFF RxClk_(n)INV Reserved
1
x
x
x
x
F
IGURE
16. T
HE
B
EHAVIOR
OF
THE
TPD
ATA
AND
T
X
C
LK
I
NPUT
S
GNALS
,
WHILE
THE
T
RANSMIT
L
OGIC
B
LOCK
IS
A
CCEPTING
S
INGLE
-R
AIL
D
ATA
FROM
THE
T
ERMINAL
E
QUIPMENT
TxClk
TPData
Data 1 1 0
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