參數(shù)資料
型號(hào): XRT73LC00AIV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PQFP44
封裝: 10 X 10 MM, 1.40 MM HEIGHT, TQFP-44
文件頁數(shù): 44/53頁
文件大?。?/td> 376K
代理商: XRT73LC00AIV
XRT73LC00A
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.0
TPDATA
TNDATA
TCLK
PRELIMINARY
41
During Remote Loop-Back operation, any data which
is inputted via the RTIP and RRING input pins is also
outputted to the Terminal Equipment via the RPOS,
RNEG and RCLK output pins.
The XRT73LC00A can be configured to operate in
the Remote Loop-Back Mode by employing either
one of the following two steps
If the XRT73LC00A is operating in the HOST
Mode:
Access the Microprocessor Serial Interface and write
a “1” into the RLB bit-field and a “0” in the LLB bit-field
in Command Register CR4.
If the XRT73LC00A is operating in the Hardware
Mode:
Set the RLB input pin (pin 15) to “High” and the LLB
input pin (pin 16) to “Low”.
4.4
TXOFF F
EATURES
The XRT73LC00A allows the Transmit Driver in the
Transmit Section of the chip to be shut off. This fea-
ture can be advantageous for system redundancy
conditions or during diagnostic testing. This feature
can be activated by either of the following ways.
When the XRT73LC00A is operating in the Hard-
ware Mode
Shut off the Transmit Driver by toggling the TXOFF in-
put pin (pin 35) “High”. Turn on the Transmit Driver by
toggling the TXOFF input pin “Low”.
When the XRT73LC00A is operating in the HOST
Mode
If the XRT73LC00A is operating in the HOST Mode,
the TXOFF input pin is disabled. Consequently, the-
Transmit Driver is turned off by writing to Command
Register CR1 and setting the TXOFF bit-field (bit D4)
to “1”.
N
OTE
:
If the Transmitter is shut off via the TXOFF feature,
the XRT73LC00A can NOT be configured to operate in the
Analog Local Loop-Back Mode. To perform diagnostics on
the chip and still invoke the TXOFF feature as in System
Redundancy Applications, use the Digital Local Loop-Back
feature instead.
4.5
T
HE
T
RANSMIT
D
RIVE
M
ONITOR
F
EATURES
F
IGURE
31. T
HE
R
EMOTE
L
OOP
-B
ACK
P
ATH
IN
THE
XRT73LC00A
AGC/
Equalizer
Peak
Detector
LOS Detector
Slicer
Clock
Recovery
Data
Recovery
Invert
Loop MUX
HDB3/
B3ZS
Decoder
LOSTHR
SDI
SDO/LCV
SCLK
CS
REGRESET
RTIP
RRING
REQDIS
RCLK1
RCLK2/LCV
RPOS
RNEG
DR/SR
RLOS
LLB
RLB
ENDECDIS
TAOS
RLOL EXCLK
Device
Monitor
MTIP
MRING
Transmit
Logic
Duty Cycle Adjust
TXLEV
TXOFF
DMO
TTIP
TRING
Pulse
Shaping
HDB3/
B3ZS
Encoder
Serial
Processor
Interface
Remote
Loop-Back Path
COMMAND REGISTER CR4 (ADDRESS = 0X04)
D4
D3
D2
D1
D0
X
STS-1/DS3
E3
LLB
RLB
X
X
X
0
1
COMMAND REGISTER CR1 (ADDRESS = 0X01)
D4
D3
D2
D1
D0
TXOFF
TAOS
TXCLKINV
TXLEV
TXBIN
1
X
X
X
X
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