參數(shù)資料
型號: XRT73R06IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA217
封裝: 23 X 23 MM, BGA-217
文件頁數(shù): 11/68頁
文件大?。?/td> 347K
代理商: XRT73R06IB
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SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73R06
REV. 1.0.0
8
CLOCK INTERFACE
L
EAD
#
S
IGNAL
N
AME
T
YPE
D
ESCRIPTION
E15
E3CLK
I
E3 Clock Input (34.368 MHz ± 20 ppm):
If any of the channels is configured in E3 mode, a reference clock 34.368 MHz
is applied on this pin.
N
OTE
:
In single frequency mode, this reference clock is not required.
G16
DS3CLK
I
DS3 Clock Input (44.736 MHz ± 20 ppm):
If any of the channels is configured in DS3 mode, a reference clock 44.736
MHz. is applied on this pin.
N
OTE
:
In single frequency mode, this reference clock is not required.
C16
STS-1CLK/
12M
I
STS-1 Clock Input (51.84 MHz ± 20 ppm):
If any of the channels is configured in STS-1 mode, a reference clock 51.84
MHz is applied on this pin..
In Single Frequency Mode, a reference clock of 12.288 MHz ± 20 ppm is con-
nected to this pin and the internal clock synthesizer generates the appropriate
clock frequencies based on the configuration of the channels in E3, DS3 or
STS-1 modes.
L15
SFM_EN
I
Single Frequency Mode Enable:
Tie this pin “High” to enable the Single Frequency Mode. A reference clock of
12.288 MHz ± 20 ppm is applied.
In the Single Frequency Mode (SFM) a low jitter output clock is provided for
each channel if the CLK_EN bit is set thus eliminating the need for a separate
clock source for the framer.
Tie this pin “Low” if single frequency mode is not selected. In this case, the
appropriate reference clocks must be provided.
N
OTE
:
This pin is internally pulled down
B1
T1
B17
T17
D11
P11
CLKOUT_0
CLKOUT_1
CLKOUT_2
CLKOUT_3
CLKOUT_4
CLKOUT_5
O
Clock output for channel 0
Clock output for channel 1
Clock output for channel 2
Clock output for channel 3
Clock output for channel 4
Clock output for channel 5
Low jitter clock output for each channel based on the mode selection (E3,DS3
or STS-1) if the CLKOUTEN_n bit is set in the control register.
This eliminates the need for a separate clock source for the framer.
N
OTES
:
1.
The maximum drive capability for the clockouts is 16 mA.
2.
This clock out is available both in SFM and non-SFM modes.
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