參數(shù)資料
型號: XRT75L03DIVTR-F
廠商: Exar Corporation
文件頁數(shù): 29/134頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標準包裝: 750
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 128-LQFP(14x20)
包裝: 帶卷 (TR)
XRT75L03D
á
REV. 1.0.0
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
119
Figure 57 indicates that the Data Signal from the Mapper device should be connected to the TPDATA_n input
pin of the LIU IC and that the Clock Signal from the Mapper device should be connected to the TCLK_n input
pin of the LIU IC.
In this application, the XRT75L03D has the following responsibilities.
Using a particular clock edge within the "gapped" clock signal (from the Mapper IC) to sample and latch the
value of each DS3 data-bit that is output from the Mapper IC.
To (through the user of the Jitter Attenuator block) attenuate the jitter within this "DS3 data" and "clock signal"
that is output from the Mapper IC.
To convert this "smoothed" DS3 data and clock into industry-compliant DS3 pulses, and to output these
pulses onto the line.
To configure the XRT75L03D to operate in the correct mode for this application, the user must execute the
following configuration steps.
a.
Configure the XRT75L03D to operate in the DS3 Mode
The user can configure a given channel (within the XRT75L03D) to operate in the DS3 Mode, by executing
either of the following steps.
If the XRT75L03D has been configured to operate in the Host Mode
The user can accomplish this by setting both Bits 2 (E3_n) and Bits 1 (STS-1/DS3*_n), within each of the
"Channel Control Registers" to "0" as depicted below.
If the XRT75L03D has been configured to operate in the Hardware Mode
The user can accomplish this by pulling all of the following input pins "Low".
Pin 76 - E3_0
Pin 94 - E3_1
Pin 85 - E3_2
Pin 72 - STS-1/DS3_0
Pin 98 - STS-1/DS3_1
Pin 81 - STS-1/DS3_2
b.
Configure the XRT75L03D to operate in the Single-Rail Mode
Since the Mapper IC will typically output a single "Data Line" and a "Clock Line" for each DS3 signal that it
demaps from the incoming STS-N signal, it is imperative to configure each channel within the XRT75L03D to
operate in the Single Rail Mode.
The user can accomplish this by executing either of the following steps.
If the XRT75L03D has been configured to operate in the Host Mode
The user can accomplish this by setting Bit 0 (SR/DR*), within the each of the "Channel Control" Registers to 1,
as illustrated below.
CHANNEL CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X06
CHANNEL 1 ADDRESS LOCATION = 0X0E
CHANNEL 2 ADDRESS LOCATION = 0X16
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1
BIT 0
Unused
PRBS Enable
Ch_n
RLB_n
LLB_n
E3_n
STS-1/DS3_n
SR/DR_n
R/O
R/W
00
000
00
0
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參數(shù)描述
XRT75L03ES 功能描述:時鐘合成器/抖動清除器 3 CH T3/E3/STS1 LIU+JA 3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L03IV 功能描述:外圍驅(qū)動器與原件 - PCI 3CH E3/DS3/STS1 JITTER ATTENUATOR RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L03IV-F 功能描述:外圍驅(qū)動器與原件 - PCI 3-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L03IVTR 功能描述:時鐘合成器/抖動清除器 3CH E3/DS3/STS1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L03IVTR-F 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel