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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� XRT75L06DIB-F
寤犲晢锛� Exar Corporation
鏂囦欢闋佹暩(sh霉)锛� 29/103闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC LIU E3/DS3/STS-1 6CH 217BGA
妯欐簴鍖呰锛� 60
椤炲瀷锛� 绶氳矾鎺ュ彛瑁濈疆锛圠IU锛�
椹�(q奴)鍕曞櫒/鎺ユ敹鍣ㄦ暩(sh霉)锛� 6/6
瑕�(gu墨)绋嬶細 DS3锛孍3锛孲TS-1
闆绘簮闆诲锛� 3.135 V ~ 3.465 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 217-BBGA
渚涙噳鍟嗚ō(sh猫)鍌欏皝瑁濓細 217-BGA锛�23x23锛�
鍖呰锛� 鎵樼洡
xr
XRT75L06D
REV. 1.0.4
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
27
3.4
TRANSMIT PULSE SHAPER
The Transmit Pulse Shaper converts the B3ZS encoded digital pulses into a single analog Alternate Mark
Inversion (AMI) pulse that meets the industry standard mask template requirements for STS-1 and DS3. For
E3 mode, the pulse shaper converts the HDB3 encoded pulses into a single full amplitude square shaped
pulse with very little slope. The Pulse Shaper Block also includes a Transmit Build Out Circuit, which can
either be disabled or enabled by setting the TxLEV_n bit to 鈥�1鈥� or 鈥�0鈥� in the control register. For DS3/STS-1
rates, the Transmit Build Out Circuit is used to shape the transmit waveform that ensures that transmit pulse
template requirements are met at the Cross-Connect system. The distance between the transmitter output and
the Cross-Connect system can be between 0 to 450 feet. For E3 rate, since the output pulse template is
measured at the secondary of the transformer and since there is no Cross-Connect system pulse template
requirements, the Transmit Build Out Circuit is always disabled. The differential line driver increases the
transmit waveform to appropriate level and drives into the 75
load as shown in Figure 20.
FIGURE 20. TRANSMIT PULSE SHAPE TEST CIRCUIT
3.4.1
Guidelines for using Transmit Build Out Circuit
If the distance between the transmitter and the DSX3 or STSX-1, Cross-Connect system, is less than 225 feet,
enable the Transmit Build Out Circuit by setting the TxLEV_n control bit to 鈥�0鈥�. If the distance between the
transmitter and the DSX3 or STSX-1 is greater than 225 feet, disable the Transmit Build Out Circuit.
FIGURE 19. HDB3 ENCODING FORMAT
0
00
0
1
V
B
V
1
00
0
00
V
0
00
TClk
Line
Signal
TPDATA
TTIP(n)
TRing(n)
1:1
R3
75
TxPOS(n)
TxNEG(n)
TxLineClk(n)
TPData(n)
TNData(n)
TxClk(n)
31.6
+ 1%
31.6
+1%
R1
R2
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
XRT75L06IB-F IC LIU E3/DS3/STS-1 6CH 217BGA
XRT75R03DIV-F IC LIU E3/DS3/STS-1 3CH 128LQFP
XRT75R03IV-F IC LIU E3/DS3/STS-1 3CH 128LQFP
XRT75R06DIB-F IC LIU E3/DS3/STS-1 6CH 217BGA
XRT75R06IB-F IC LIU E3/DS3/STS-1 6CH 217BGA
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鍙冩暩(sh霉)鎻忚堪
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XRT75L06IB 鍔熻兘鎻忚堪:鎺ュ彛 - 灏堢敤 6CH E3/DS3/STS1 LIU+Jitter Attenuato RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鐢�(ch菐n)鍝侀鍨�:1080p60 Image Sensor Receiver 宸ヤ綔闆绘簮闆诲:1.8 V 闆绘簮闆绘祦:89 mA 鏈€澶у姛鐜囪€楁暎: 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:BGA-59
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