參數(shù)資料
型號(hào): XRT75R03
廠商: Exar Corporation
英文描述: THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
中文描述: Three頻道E3/DS3/STS-1線路接口單元與抖動(dòng)衰減器
文件頁數(shù): 51/92頁
文件大小: 492K
代理商: XRT75R03
xr
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R03
REV. 1.0.7
48
6.4.3
When the LOS condition is declared, the clock recovery circuit locks into the reference clock applied to the
ExClk_n pin and output this clock on the RxClk_n output.In Single Frequency Mode (SFM), the clock recovery
locks into the rate clock generated and output this clock on the RxClk_n pins. The data on the RPOS_n and
RNEG_n pins can be forced to zero by pulling the LOSMUT pin “High” (in Hardware Mode) or by setting the
LOSMUT_n bits in the individual channel control register to “1” (in Host Mode).
N
OTE
:
When the LOS condition is cleared, the recovered data is output on RPOS_n and RNEG_n pins.
Muting the Recovered Data with LOS condition:
7.0
JITTER:
There are three fundamental parameters that describe circuit performance relative to jitter:
Jitter Tolerance (Receiver)
Jitter Transfer (Receiver/Transmitter)
Jitter Generation
7.1
J
ITTER
T
OLERANCE
- R
ECEIVER
:
Jitter tolerance is a measure of how well a Clock and Data Recovery unit can successfully recover data in the
presence of various forms of jitter. It is characterized by the amount of jitter required to produce a specified bit
error rate. The tolerance depends on the frequency content of the jitter. Jitter Tolerance is measured as the
jitter amplitude over a jitter spectrum for which the clock and data recovery unit achieves a specified bit error
rate (BER). To measure the jitter tolerance as shown in Figure 21, jitter is introduced by the sinusoidal
modulation of the serial data bit sequence.
Input jitter tolerance requirements are specified in terms of compliance with jitter mask which is represented as
a combination of points.Each point corresponds to a minimum amplitude of sinusoidal jitter at a given jitter
frequency.
7.1.1
DS3/STS-1 Jitter Tolerance Requirements:
Bellcore GR-499 CORE, Issue 1, December 1995 specifies the minimum requirement of jitter tolerance for
Category I and Category II. The jitter tolerance requirement for Category II is the most stringent. Figure 22
shows the jitter tolerance curve as per GR-499 specification.
F
IGURE
22. J
ITTER
T
OLERANCE
M
EASUREMENTS
FREQ
Synthesizer
Pattern
Generator
DUT
XRT75R03
Error
Detector
Modulation
Freq.
Data
Clock
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參數(shù)描述
XRT75R03D 制造商:EXAR 制造商全稱:EXAR 功能描述:THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
XRT75R03D_06 制造商:EXAR 制造商全稱:EXAR 功能描述:EXAR DATA SHEET FORMAT TEMPLATES
XRT75R03DES 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3CH T3/E3/STS1LIU+D 3.3V W/REDUNDANCY RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75R03DIV 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
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