- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376462 > XRT75R03D (Exar Corporation) THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER PDF資料下載
參數(shù)資料
| 型號(hào)： | XRT75R03D |
| 廠商： | Exar Corporation |
| 英文描述： | THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER |
| 中文描述： | Three頻道E3/DS3/STS-1線路接口單元與SONET DESYNCRONIZER |
| 文件頁(yè)數(shù)： | 16/134頁(yè) |
| 文件大?。?/td> | 803K |
| 代理商： | XRT75R03D |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)當(dāng)前第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)
XRT75R03D
REV. 1.0.2
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
11
57
113
52
RNEG_0/LCV_0
RNEG_1/LCV_1
RNEG_2/LCV_2
O
Receive Negative Data Output/Line Code Violation Indicator -
Channel 0:
Receive Negative Data Output/Line Code Violation Indicator -
Channel 1:
Receive Negative Data Output/Line Code Violation Indicator -
Channel 2:
The function of these pins depends on whether the XRT75R03D is configured in
Single Rail or Dual Rail mode.
Dual-Rail Mode - Receive Negative Polarity Data Output
If the channel/device has been configured to operate in the Dual-Rail Mode,
then all negative-polarity data will be output via this output pin. The positive-
polarity data will be output via the corresponding RPOS_n output pin. In other
words, the Receive Section of the corresponding Channel will pulse this output
pin "High" for one period of RCLK_n anytime it receives a negative-polarity
pulse via the RTIP/RRING input pins.
The data that is output via this pin is updated upon a user-selectable edge of the
RCLK_n output clock signal.
Single-Rail Mode - Line Code Violation Indicator Output
If the channel/device has been configured to operate in the Single-Rail Mode,
then this particular output pin will function as the Line Code Violation indicator
output.
In this configuration, the Receive Section of the Channel will pulse this output
pin "High" for at least one RCLK period whenever it detects either an LCV (Line
Code Violation) or an EXZ (Excessive Zero Event).
The data that is output via this pin is updated upon a user-selectable edge of the
RCLK_n output clock signal.
56
114
51
RxClk_0
RxClk_1
RxClk_2
O
Receive Clock Output - Channel 0:
Receive Clock Output - Channel 1:
Receive Clock Output - Channel 2:
This output pin functions as the Receive or recovered clock signal. All Receive
(or recovered) data will output via the RPOS_n and RNEG_n outputs upon the
user-selectable edge of this clock signal.
Additionally, if the device/channel has been configured to operate in the Single-
Rail Mode, then the RNEG_n/LCV_n output pins will also be updated upon the
user-selectable edge of this clock signal.
75
95
84
REQEN_0
REQEN_1
REQEN_2
I
Receive Equalization Enable Input - Channel 0:
Receive Equalization Enable Input - Channel 1:
Receive Equalization Enable Input - Channel 2:
These input pins are used to either enable or disable the Receive Equalizer
block within the Receive Section of the corresponding channel.
"Low" - Disables the Receive Equalizer within the corresponding channel.
"High" - Enables the Receive Equalizer within the corresponding channel.
N
OTES
:
1.
For virtually all applications, it is recommend that this input pin be
pulled "High" and enable the Receive Equalizer.
2.
This input pin ignored and should be tied to GND if the XRT75R03D
has been configured to operate in the Host Mode.
3.
These input pins are internally pulled low.
SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS
P
IN
#
S
IGNAL
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT75R03DIV | THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER |
| XRT75R03 | THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75R03IV | THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75R06D | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| XRT75R06DIB | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75R03D_06 | 制造商:EXAR 制造商全稱:EXAR 功能描述:EXAR DATA SHEET FORMAT TEMPLATES |
| XRT75R03DES | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3CH T3/E3/STS1LIU+D 3.3V W/REDUNDANCY RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75R03DIV | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75R03DIV-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3-Ch E3/DS3/STS-1 RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT75R03DIVTR | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。