參數(shù)資料
型號: XRT75R03IVTR
廠商: Exar Corporation
文件頁數(shù): 58/92頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標準包裝: 750
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-LQFP(14x20)
包裝: 帶卷 (TR)
xr
XRT75R03
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.8
58
THE GLOBAL/CHIP-LEVEL REGISTERS
The register set, within the XRT75R03 consists of five "Global" or "Chip-Level" Registers and 21 per-Channel
Registers. This section will present detailed information on the Global Registers.
REGISTER DESCRIPTION - GLOBAL REGISTERS
TABLE 17: LIST AND ADDRESS LOCATIONS OF GLOBAL REGISTERS
ADDRESS
COMMAND REGISTER
TYPE
REGISTER NAME
0x00
CR0
R/W
APS/Redundancy Control Register
0x01 - 0x1F
Bank of Per-Channel Registers
0x20
CR32
R/W
Block Level Interrupt Enable Register
0x21
CR33
R/O
Block Level Interrupt Status Register
0x22 - 0x3D
Reserved Registers
0x3E
CR62
R/O
Device/Part Number Register
0x3F
CR63
R/O
Chip Revision Number Register
TABLE 18: APS/REDUNDANCY CONTROL REGISTER - CR0 (ADDRESS LOCATION = 0X00)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Reserved
RxONCh 2
RxON Ch 1
RxON Ch 0
Reserved
TxON Ch 2
TxON Ch 1
TxON Ch 0
R/O
R/W
R/O
R/W
0
BIT
NUMBER
NAME
TYPE
DEFAULT
VALUE
DESCRIPTION
7
Reserved
R/O
0
6
RxON Ch 2
R/W
0
Receiver Section ON - Channel 2
This READ/WRITE bit-field is used to either turn on or turn off the
Receive Section of Channel 2. If the user turns on the Receive Sec-
tion, then Channel 2 will begin to receive the incoming DS3, E3 or
STS-1 data-stream via the RTIP_2 and RRING_2 input pins.
Conversely, if the user turns off the Receive Section, then the entire
Receive Section (e.g., AGC and Receive Equalizer Block, Clock
Recovery PLL, etc) will be powered down.
0 - Shuts off the Receive Section of Channel 2.
1 - Turns on the Receive Section of Channel 2.
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XRT75R06 制造商:EXAR 制造商全稱:EXAR 功能描述:SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
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