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參數(shù)資料
| 型號： | XRT75R12IB-L |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 72/90頁 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 12CH 420TBGA |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 12/12 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 420-LBGA 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 420-TBGA（35x35） |
| 包裝： | 托盤 |
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XRT75R12
71
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.4
3
FL Alarm Declared
R/O
FL (FIFO Limit) Alarm Declared:
This READ-ONLY bit-field indicates whether or not the Jitter Attenuator
block (within Channel_n) is currently declaring the FIFO Limit Alarm.
The Jitter Attenuator block will declare the FIFO Limit Alarm anytime the Jit-
ter Attenuator FIFO comes within two bit-periods of either overflowing or
under-running.
Conversely, the Jitter Attenuator block will clear the FIFO Limit Alarm any-
time the Jitter Attenuator FIFO is NO longer within two bit-periods of either
overflowing or under-running.
Typically, this Alarm will only be declared whenever there is a very serious
problem with timing or jitter in the system.
0 - Indicates that the Jitter Attenuator block (within Channel_n) is NOT cur-
rently declaring the FIFO Limit Alarm condition.
1 - Indicates that the Jitter Attenuator block (within Channel_n) is currently
declaring the FIFO Limit Alarm condition.
NOTE: This bit-field is only active if the Jitter Attenuator (within Channel_n)
has been enabled.
2
Receive LOL Condi-
tion Declared
R/O
Receive LOL (Loss of Lock) Condition Declared:
This READ-ONLY bit-field indicates whether or not the Receive Section
(within Channel_n) is currently declaring the LOL (Loss of Lock) condition.
The Receive Section (of Channel_n) will declare the LOL Condition, if the
frequency of the Recovered Clock signal differs from that of the reference
clock programmed for that channel (from the appropriate oscillator or the
SFM clock synthesizer if in that mode) by 0.5% (or 5000ppm) or more .
0 - Indicates that the Receive Section of Channel_n is NOT currently declar-
ing the LOL Condition.
1 - Indicates that the Receive Section of Channel_n is currently declaring
the LOL Condition and the recovered clock differs by more than 0.5%..
TABLE 34: ALARM STATUS R- CHANNEL n ADDRESS LOCATION = 0XM3
(n = [0:11] & M= 0-5 & 8-D)
BIT NUMBER
NAME
TYPE
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT75VL00DIV | IC LIU E3/DS3/STS-1 1CH 52TQFP |
| XRT75VL00IV-F | IC LIU E3/DS3/STS-1 1CH 52TQFP |
| XRT79L71IB-F | IC LIU/FRAMER DS3/E3 1CH 208BGA |
| XRT81L27IV-F | IC LIU EI 7CH 3.3V 128TQFP |
| XRT82D20IW-F | IC LIU E1 SGL 28SOJ |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75VL00 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75VL00_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75VL00D | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
| XRT75VL00D_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET |
| XRT75VL00D1V-F | 制造商:Exar Corporation 功能描述: |
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