參數(shù)資料
型號(hào): XRT8001
廠商: Exar Corporation
英文描述: WAN Clock for T1 and E1 Systems
中文描述: 廣域網(wǎng)時(shí)鐘T1和E1系統(tǒng)
文件頁(yè)數(shù): 29/48頁(yè)
文件大?。?/td> 1054K
代理商: XRT8001
XRT8001
29
Rev. 1.01
Figure 17. Illustration of the XRT8001 WAN Clock
Operating in the “High Speed – Reverse” Mode
6.7 Configuring the XRT8001 WAN Clock into the
“High Speed – Reverse” Mode.
The user can configure the XRT8001 WAN Clock to
operate in the “High Speed – Reverse” Mode, by
executing the following steps.
Step 1
– Configure the XRT8001 to operate in the
“SLAVE” Mode, by pulling the “MSB” input pin (pin 8)
to GND.
Step 2
- Write the value "1101" into bts D4-D1 within
command register CR0
Note:
If the user wishes to output a clock signal via the
CLK1 output signal, then he/she should also write a “1” into
the “PL1EN” bit-field within Command Register CR0.
This step configures the XRT8001 to operate in the
“High Speed – Reverse” Mode.
Step 3
– Write the binary expression “0000” into bit-
fields “D4 through D1” within Command Register, CR1,
as illustrated below.
Note:
If the user wishes to output a clock signal via the
CLK2 output signal, then he/she should also write a “1” into
the “PL2EN” bit-field within Command Register CR1.
Step 4
– Specify the value for “M” (e.g., as in the “M x
2.048MHz” clock signal) which is to be output via the
“CLK1” output pin.
This is accomplished by reviewing Table 7, and deter-
mining the 5 bit binary value which corresponds with
the desired value of “M”. Afterwards, the user should
write this value into Command Register CR2.
Command Register, CR1 (Address = 0x01)
D4
D3
M4
M3
0
0
D2
M2
0
D1
M1
0
D0
PL2EN
1
Command Register CR0 (Address = 0x00)
D4
D3
IOC4
IOC3
1
1
D2
IOC2
0
D1
IOC1
1
D0
PL1EN
X
XRT8001
WAN Clock
FIN
CLK1
CLK2
64kHz
M x 2.048MHz
M = 1, 2, 4 or 8
M x 2.048MHz
M = 1, 2, 4 or 8
相關(guān)PDF資料
PDF描述
XRT8001ID WAN Clock for T1 and E1 Systems
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