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參數(shù)資料
型號(hào): XRT82L24AIV-F
廠商: Exar Corporation
文件頁數(shù): 36/39頁
文件大小: 0K
描述: IC LIU E1 QAUD 100TQFP
標(biāo)準(zhǔn)包裝: 90
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 4/4
規(guī)程: E1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
包裝: 托盤
其它名稱: XRT82L24AIV-F-ND
XRT82L24A
á
QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.1.2
4
PIN DESCRIPTION
PIN DESCRIPTIONS
PIN #NAME
TYPE
DESCRIPTION
RECEIVER SECTIONS
1
25
51
75
RxCLK_0/RZData_0
RxCLK_1/RZData_1
RxCLK_2/RZData_2
RxCLK_3/RZData_3
O
Receiver_n Clock Output
Rzdata Output:
In Data Slicer Mode, (register 0, bit 7 = 1) or in Hardware Mode when MClk is
absent, this signal is OR-ed RZdata after the slicers.
2
24
52
74
RxLOS_0
RxLOS_1
RxLOS_2
RxLOS_3
O
Receiver_n Loss of Signal. This signal is asserted "High" to indicate loss of
signal at the receive input.
100
26
50
76
RxPOS_0/RData_0
RxPOS_1/RData_1
RxPOS_2/RData_2
RxPOS_3/RData_3
O
Receiver 1 Positive Data Output:
In dual-rail mode, this signal is the receive P-rail output data.
Receiver 1 NRZ Data Output:
In single-rail mode, this signal is the receive output data.
99
49
77
RxNEG_0/LCV_0
RxNEG_1/LCV_1
RxNEG_2/LCV_2
RxNEG_3/LCV_3
O
Receiver_n Negative Data Output:
In dual-rail mode, n-rail data are sent to the framer.
Line Code Violation Output - Channel_n:
In single-rail mode, this signal output "High" for one receive clock cycle to indi-
cate a code violation is detected in the received data. If AMI coding is selected,
every bipolar violation received will cause this pin to go "High".
95
31
45
81
RRing_0
RRing_1
RRing_2
RRing_3
I
Receiver_n Differential Negative Input.
94
32
44
82
RTIP_0
RTIP_1
RTIP_2
RTIP_3
I
Receiver_n Differential Positive Input.
67
RXMUTE
I
Hardware Mode, Receive Muting:
Connect this pin "High" to mute RxPOS/RxNEG output to a low state upon
receive LOS condition to prevent data chattering. Connect Low to disable mut-
ing function.
TRANSMITTER SECTIONS
3
23
53
73
TxNEG_0
TxNEG_1
TxNEG_2
TxNEG_3
I
Transmitter_n Negative NRZ Data Input. In dual-rail mode, this signal is the n-
rail input data for transmitter 0. In single-rail mode, this pin can be left uncon-
nected.
4
22
54
72
TxPOS_0/TData_0
TxPOS_1/TData_1
TxPOS_2/TData_2
TxPOS_3/TData_3
I
Transmitter_n Positive Data Input. In dual-rail mode, this signal is the p-rail
input data for transmitter 0.
Transmitter 0 Data Input. In single-rail mode, this pin is used as the NRZ input
data for transmitter 0.
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