XRT83SL216
27
REV. 1.0.0
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
FIGURE 22. TIMING DIAGRAM FOR THE MICROPROCESSOR SERIAL INTERFACE
TABLE 5: MICROPROCESSOR SERIAL INTERFACE TIMINGS ( TA = 25
0C, V
DD=3.3V± 5% AND LOAD = 10PF)
SYMBOL
PARAMETER
MIN.
TYP.
MAX
UNITS
t21
CS Low to Rising Edge of SClk
5
ns
t22
SDI to Rising Edge of SClk
5
ns
t23
SDI to Rising Edge of SClk Hold Time
5
ns
t24
SClk "Low" Time
50
ns
t25
SClk "High" Time
50
ns
t26
SClk Period
100
ns
t27
Falling Edge of SClk to rising edge of CS
0
ns
t28
CS Inactive Time
50
ns
t29
Falling Edge of SClk to SDO Valid Time
20
ns
t30
Falling Edge of SClk to SDO Invalid Time
10
ns
t31
Rising edge of CS to High Z
25
ns
t32
Rise/Fall time of SDO Output
5
ns
SDI
R/W
A1
A0
CS
SCLK
CS
SCLK
SDI
SDO
D0
D1
D2
D7
t
21
t
22
t
23
t
24
t
25
t
26
t
27
t
28
t
29
t
30
t
31
t
32
Don’t Care (Read mode)
Hi-Z