參數(shù)資料
型號(hào): XRT91L306
廠商: Exar Corporation
英文描述: STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
中文描述: STS-12/STM-4或STS-3/STM-1的SONET / SDH收發(fā)器
文件頁數(shù): 21/39頁
文件大?。?/td> 440K
代理商: XRT91L306
xr
REV. 1.0.1
XRT91L30
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
19
2.10
The receive parallel data output from the STS-12/STM-4 or STS-3/STM-1 receiver will adhere to the setup and
hold times shown in Figure 10 ,Table 7, and Table 8. Table 9 shows the PECL and TTL output timing
specifications.
F
IGURE
10. R
ECEIVE
P
ARALLEL
O
UTPUT
T
IMING
Receive Parallel Data Output Timing
T
ABLE
7: R
ECEIVE
P
ARALLEL
D
ATA
O
UTPUT
T
IMING
(STS-12/STM-4 O
PERATION
)
T
ABLE
8: R
ECEIVE
P
ARALLEL
D
ATA
O
UTPUT
T
IMING
(STS-3/STM-1 O
PERATION
)
S
YMBOL
P
ARAMETER
M
IN
T
YP
M
AX
U
NITS
t
RXCLK
Receive high-speed serial clock period
1.608
ns
t
RXPCLKO
Receive parallel data output byte clock period
12.86
ns
t
RXDO_VALID
Time the data is valid on RXDO[7:0] and FRAMEPULSE
before and after the rising edge of RXPCLKO
4
ns
t
PULSE_WID
Pulse width of frame detection pulse on FRAMEPULSE
12.86
ns
S
YMBOL
P
ARAMETER
M
IN
T
YP
M
AX
U
NITS
t
RXCLK
Receive high-speed serial clock period
6.43
ns
t
RXPCLKO
Receive parallel data output byte clock period
51.44
ns
t
RXDO_VALID
Time the data is valid on RXDO[7:0] and FRAMEPULSE
before and after the rising edge of RXPCLKO
22
ns
t
PULSE_WID
Pulse width of frame detection pulse on FRAMEPULSE
51.44
ns
t
RXCLK
RXPCLKO
RXDO[7:0]
RXIP
RXIN
FRAMEPULSE
t
RXDO_VALID
t
RXPCLKO
A1
A2
A2
A2
A2
t
PULSE_WID
相關(guān)PDF資料
PDF描述
XRT91L30IQ STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
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