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YMU757
#
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33-
Serial I/F Specifications
The Y M U 757 iscontrolled through the three serialinterfacesSCLK ,SYNC and SD IN.
Aboutthe relationsbetw een SD IN and SC LK
The value ofSD IN istaken in the inside ofthe LSIatthe SCLK rise.
InputSD IN so thatsetup/Hold time issecured to rise edge ofSCLK .
(Referto the AC characteristicsofthe electric characteristicsforthe detailsofthe timing specification.)
AboutSD IN
The figure above show sno data transm ission betw een Index data and Controldata butitm eansnothing
problem atic.24 bitcontinuousdata transm ission isalso possible.
When transm itting the data by 8-bitunit,transm itthe upper8 bits and low er8 bits ofthe controldata separately.
There isno particularspecification forthe intervalbetw een the end oftransm ission ofthe upper8 bits and startof
transm ission ofthe low er8 bits.How ever,the longerthe intervalis,the longertime one transm ission takes.When
entering the musicalscore data into FIFO ,use care notto make FIFO em pty.
AboutSYNC
Itcan correspond to Type1 and Type2 ofthe upperfigure.
When rise edge ofSYNC occursinside the LSI,itconsidersthatthe data transferofone time wascom pleted.
SD IN for24×SCLK justbefore rise edge ofSYNC occursisjudged valid data.
(SD IN for16×SCLK are valid data when transferonly ControlData.)
There isno regulation specially aboutthe length ofthe H period.
But,L period isto make 100nsbe secured atleastin the case ofthe Type2 wave shape
Ithasthe possibility thatfaulty operation iscaused when rise edge ofSYNC and falledge ofSCLK approach it.
Give carefulconsideration to rise edge ofSCLK doesn’toccurtow ard rise edge ofSYNC.
Aboutthe data transfer only ControlData.
If inputSD IN for SCLK ×16 betw een rise edge of SY N C and nextrise edge of SYNC,the inside of the LSI is
judged itismusic data ($00h)and take it.
SCLK
8 clk
16 clk
SYNC
Type1
SD IN
MSB
LSB
MSB
LSB
Index Data (8bit)
ControlData (16bit)
6
#
7
#
1
# 0#
15
#
1
# 0#
MSB
6
#
7
#
SYNC
Type2