參數(shù)資料
型號(hào)： Z8613112SSC
廠商： ZILOG INC
元件分類： 消費(fèi)家電
英文描述： CAP 0.056UF 100V 10% X7R AXIAL TR-14
中文描述： SPECIALTY CONSUMER CIRCUIT, PDSO18
封裝： PLASTIC, SOIC-18
文件頁數(shù)： 28/50頁
文件大小： 927K
代理商： Z8613112SSC
Z86129/130/131
NTSC Line 21 Decoder
P R E L I M I N A R Y
28
DS96TEL0200
INTERNAL REGISTERS
Information controlling the setup and operation of the
Z86129/130/131 are maintained in several registers. The
user may read or alter the contents of these registers as
required.
Serial Status (SS) Register Address = Not Rqd.
D
0
-LOCK.
Active High, indicating that the internal sync
circuits are locked. May be used as an indication of the
presence of a video signal.
D
1
-FLD.
Signals the current video field. Low = Field 2,
High = Field 1.
D
2
-ROVR.
Active High, indicating that the data available in
the output buffer has not been read out and new data has
been written over it.
D
3
-INTR.
Active High, indicating that an interrupt other
than DAV is pending.
D
4
-WOVR.
Active High, indicating a serial input data
overrun.
D
5
-RD2.
Signals the number of bytes available for output.
Low = 1 byte, High = 2 bytes.
D
6
-DAV.
Active High, indicating that data is available to be
read out.
D
7
-RDY.
Active High, indicating that the port input buffer is
empty. Only the NOP, RESET and READ instructions may
be sent if RDY is Low.
Configuration Register Address = 00h.
D
0
-TVS.
Selects the television standard. High selects PAL
and Low selects NTSC. The default is NTSC. When PAL
is selected the display defaults to 15 TV scan lines per
display row.
D
1
-MONO.
Selects monochrome operation. Active High,
indicating that character luminance will be output on all
three color pins (RGB). The default is Low, selecting
COLOR operation.
D
2
-HLK.
Selects the horizontal signal source to be used to
lock the VCO: Low = Internal, High = HIN. The default is
Internal.
D
3
-VLK.
Selects the vertical signal source to be used to
establish vertical sync lock: Low = Internal, High = VIN.
The default is Internal. When Internal lock is enabled the
VIN/INTRO pin will default to the INTRO output mode.
Interrupts should not be selected in the Interrupt Mask
register if VLK mode is used.
D
4
-D
7
.
Reserved
Display Register Address = 01h
D
0
-TDRP.
Selects Drop Shadow or Full Box in TEXT
mode: High = DROP SHADOW and Low = BOX. The
default is Low.
D
1
-T15.
Selects the number of TV lines per character row
in a TEXT display: High = 15 lines/row and Low = 13
lines/row. The default is Low.
D
2
-TENH.
Enables Enhanced Attributes for a TEXT
display: High = Disabled, Low = Enabled. The default is
Low.
D
3
-CDRP.
Selects Drop Shadow or Full Box in CAPTION
mode: High = DROP SHADOW and Low = BOX. The
default is Low.
D
4
-C15.
Selects the number of TV lines per character row
in a CAPTION display: High = 15 lines/row and Low = 13
lines/row. The default is Low.
D
5
-CENH.
Enables Enhanced Attributes for a CAPTION
display: High = Disabled, Low = Enabled. The default is
Low.
Note:
OSD and XDS display modes always have
Enhanced Attributes enabled.
Figure 18. Serial Status Register
(Address not required)
Figure 19. Configuration Register (Address = 00h)
Bit
RDY
DAV
R
R
R
RD2
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
WOVR
ROVR FLD
LOCK
R
R
R
R
R
INTR
Bit
TVS
MONO
R/W
R/W
R/W
HLK
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
VLK
R/W
res
res
res
res
Figure 20. Display Register (Address = 01h)
Bit
CDRP
TENH
R/W
R/W
R/W
T15
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
TDRP
R/W
O15
ODRP CENH
C15
R/W
R/W
R/W
R/W
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