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參數資料
| 型號： | Z86233 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | CMOS Z8 8K ROM CONSUMER CONTROLLER PROCESSOR |
| 中文描述： | 的CMOS Z8 8K的ROM的消費者控制器處理器 |
| 文件頁數： | 13/18頁 |
| 文件大?。?/td> | 122K |
| 代理商： | Z86233 |
13
Z86233/243
CP96DZ81201
CP96DZ81201 (8/96)
AC ELECTRICAL CHARACTERISTICS
Additional Timing Table (SCLK/TCLK = XTAL/2)
T
= 0
°
C to +70
°
C
12 MHz
Min
Max
T
= –40
°
C to +105
°
C
12 MHz
Min Max
V
16 MHz
Min Max
16 MHz
Min Max Units
No Symbol Parameter
Note[6]
Notes
1
TpC
Input Clock Period
3.0V
5.5V
3.0V
5.5V
83
83
DC
DC
15
15
62.5
62.5
DC
DC
15
15
83
83
DC
DC
15
15
62.5
62.5
DC
DC
15
15
ns
ns
ns
ns
[1]
[1]
[1]
[1]
2
TrC,TfC Clock Input Rise & Fall Times
3
TwC
Input Clock Width
3.0V
5.5V
3.0V
5.5V
41
41
100
70
31
31
100
70
41
41
100
70
31
31
100
70
ns
ns
ns
ns
[1]
[1]
[1]
[1]
4
TwTinL
Timer Input LowWidth
5
TwTinH Timer Input High Width
3.0V
5.5V
3.0V
5.5V
5TpC
5TpC
8TpC
8TpC
5TpC
5TpC
8TpC
8TpC
5TpC
5TpC
8TpC
8TpC
5TpC
5TpC
8TpC
8TpC
[1]
[1]
[1]
[1]
6
TpTin
Timer Input Period
7
TrTin,
TfTin
Timer Input Rise & Fall Timer
3.0V
5.5V
3.0V
5.5V
100
100
100
100
100
100
100
100
ns
ns
ns
ns
[1]
[1]
[1,2]
[1,2]
8A TwIL
Int. Request LowTime
100
70
100
70
100
70
100
70
8B TwIL
Int. Request LowTime
3.0V
5.5V
3.0V
5.5V
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
[1,3]
[1,3]
[1,2]
[1,2]
9
TwIH
Int. Request Input High Time
10 Twsm
STOP-Mode Recovery Width Spec
3.0V
5.5V
3.0V
5.5V
12
12
12
12
12
12
12
12
ns
ns
11 Tost
Oscillator Startup Time
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
5TpC
[4]
[4]
12 Twdt
Watch-Dog Timer Delay Time
Before Time-Out
D1 D0
0
0
0
0
1
1
1
1
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
3.0V
5.5V
10
5
20
10
40
20
160
80
10
5
20
10
40
20
160
80
10
5
20
10
40
20
160
80
10
5
20
10
40
20
160
80
ms
ms
ms
ms
ms
ms
ms
ms
0 [5]
0 [5]
1 [5]
1 [5]
0 [5]
0 [5]
1 [5]
1 [5]
13 T
POR
Power On Reset Delay
3.0V
5.5V
7
3
24
13
7
3
24
13
7
3
25
14
7
3
25
14
ms
ms
Notes:
[1] Timing Reference uses 0.7 V
for a logic 1 and 0.2 V
CC
for a logic 0.
[2] Interrupt request via Port 3 (P31-P33).
[3] Interrupt request via Port 3 (P30).
[4] SMR-D5 = 0.
[5] Reg. WDTMR, internal RC used.
[6] The V
DD
voltage specification of 3.0V guarantees 3.3V
±
0.3V, and
the V
DD
voltage specification of 5.5V guarantees 5.0V
±
0.5V.
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