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參數(shù)資料
| 型號： | Z86233 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | CMOS Z8 8K ROM CONSUMER CONTROLLER PROCESSOR |
| 中文描述： | 的CMOS Z8 8K的ROM的消費者控制器處理器 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大?。?/td> | 122K |
| 代理商： | Z86233 |
14
Z86233/243
CP96DZ81201
CP96DZ81201 (8/96)
AC ELECTRICAL CHARACTERISTICS
Additional Timing Table (Divide-By-One Mode, SCLK/TCLK = XTAL)
T
A
= 0
°
C to +70
°
C
4 MHz
Min
T
A
= –40
°
C to +105
°
C
4 MHz
Min
V
No
Symbol
Parameter
Note [6]
Max
Max
Units
Notes
1
TpC
Input Clock Period
3.0V
5.5V
3.0V
5.5V
250
250
DC
DC
25
25
250
250
DC
DC
25
25
ns
ns
ns
ns
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
2
TrC,TfC
Clock Input Rise & Fall Times
3
TwC
Input Clock Width
3.0V
5.5V
3.0V
5.5V
125
125
100
70
125
125
100
70
ns
ns
ns
ns
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
4
TwTinL
Timer Input LowWidth
5
TwTinH
Timer Input High Width
3.0V
5.5V
3.0V
5.5V
3TpC
3TpC
4TpC
4TpC
3TpC
3TpC
4TpC
4TpC
[1,7,8]
[1,7,8]
[1,7,8]
[1,7,8]
6
TpTin
Timer Input Period
7
TrTin,
TfTin
TwIL
Timer Input Rise & Fall Timer
3.0V
5.5V
3.0V
5.5V
100
100
100
100
ns
ns
ns
ns
[1,7,8]
[1,7,8]
[1,2,7,8]
[1,2,7,8]
8A
Int. Request LowTime
100
70
100
70
8B
TwIL
Int. Request LowTime
3.0V
5.5V
3.0V
5.5V
3TpC
3TpC
3TpC
3TpC
3TpC
3TpC
3TpC
2TpC
[1,3,7,8]
[1,3,7,8]
[1,2,7,8]
[1,2,7,8]
9
TwIH
Int. Request Input High Time
10
Twsm
STOP-Mode Recovery Width Spec
3.0V
5.5V
3.0V
5.5V
12
12
12
12
ns
ns
[4,8]
[4,8]
[4,8,9]
[4,8,9]
11
Tost
Oscillator Startup Time
5TpC
5TpC
5TpC
5TpC
Notes:
[1]
[2]
[3]
[4]
[5]
[6]
Timing Reference uses 0.7 V
for a logic 1 and 0.2 V
CC
for a logic 0.
Interrupt request via Port 3 (P33-P31).
Interrupt request via Port 3 (P30).
SMR-D5 = 1, POR STOP mode delay is on.
Reg. WDTMR.
The V
DD
voltage specification of 3.0V guarantees 3.3V
±
0.3V, and
the V
voltage specification of 5.5V guarantees 5.5V
±
0.5V.
SMR D1 = 0.
Maximum frequency for internal system clock is 4 MHz when
using XTAL divide-by-one mode.
For RC and LC oscillator, and for oscillator driven by clock driver.
[7]
[8]
[9]
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