參數(shù)資料
型號(hào)： Z8S18033PEC
廠商： ZILOG INC
元件分類： 微控制器/微處理器
英文描述： ENHANCED Z180 MICROPROCESSOR
中文描述： 8-BIT, MICROPROCESSOR, PDIP64
封裝： PLASTIC, DIP-64
文件頁數(shù)： 60/70頁
文件大?。?/td> 387K
代理商： Z8S18033PEC
Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
Zilog
1-60
P R E L I M I N A R Y
DS971800401
Opcode is fetched during the interrupt acknowledge cycle
for INT
0
when Mode 0 is used.
When
Z80180/Z8S180/Z8L180 operates as follows:
a
TRAP
interrupt
occurs,
the
1.
The TRAP bit in the Interrupt TRAP/Control (ITC)
register is set to 1.
2.
The current PC (Program Counter) value, reflecting
the location of the undefined Opcode, is saved on the
stack.
3.
The Z80180/Z8S180/Z8L180 vectors to logical
address 0. Note that if logical address 0000H is
mapped to physical address 00000H, the vector is the
same as for RESET. In this case, testing the TRAP bit
in ITC will reveal whether the restart at physical
address 00000H was caused by RESET or TRAP.
All TRAP interrupts occur after fetching an undefined sec-
ond Opcode byte following one of the “prefix” Opcodes
CBH, DDH, EDH, or FDH, or after fetching an undefined
third Opcode byte following one of the “double prefix” Op-
codes DDCBH or FDCBH.
The state of the Undefined Fetch Object (UFO) bit in ITC
allows TRAP software to correctly “adjust” the stacked PC,
depending on whether the second or third byte of the Op-
code generated the TRAP. If UFO=0, the starting address
of the invalid instruction is equal to the stacked PC-1. If
UFO=1, the starting address of the invalid instruction is
equal to the stacked PC-2.
Figure 76. TRAP Timing-2
nd
Opcode Undefined
T
1
T
2
T
3
T
TP
T
i
T
i
T
i
T
i
T
i
T
1
T
2
T
3
T
2
T
3
T
1
T
1
T
2
A
0
-A
18
(A
19
)
φ
D
0
-D
7
PC
0000H
SP-1
Undefined
Opcode
MREQ
M1
RD
WR
T
3
SP-2
PC
H
PC
L
2nd Opcode
Fetch Cycle
PC Stacking
Opcode
Fetch Cycle
Restart
from 0000H
相關(guān)PDF資料
PDF描述
Z8S18033PSC ENHANCED Z180 MICROPROCESSOR
Z8S18033VEC CONN HDR INVERSE 30POS 5ROW R/A
Z8S18033VSC CONN HDR INVERSE 120POS 5ROW R/A
Z8S180 CAP 0.1UF 100V +80-20% Z5U AXIAL TR-14
Z8S18006FEC CAP 1UF 50V 10% X7R AXIAL TR-14
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
Z8S18033PSC 制造商:ZILOG 制造商全稱:ZILOG 功能描述:ENHANCED Z180 MICROPROCESSOR
Z8S18033VEC 功能描述:微處理器 - MPU 33MHz STATIC Z180 XT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
Z8S18033VEC00TR 功能描述:IC Z180 MPU 68PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Z180 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點(diǎn):- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤
Z8S18033VEG 功能描述:微處理器 - MPU 33MHz STATIC Z180 XT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
Z8S18033VSC 功能描述:微處理器 - MPU 33MHz STATIC Z180 RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
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