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參數(shù)資料
| 型號(hào)： | Z90103 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | CAP 680PF 100V 10% X7R AXIAL BULK R-MIL-PRF-39014 |
| 中文描述： | 40引腳低成本數(shù)字電視控制器 |
| 文件頁數(shù)： | 22/36頁 |
| 文件大?。?/td> | 232K |
| 代理商： | Z90103 |
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Z90102/90103/90104
40-Pin Low-Cost Digital Television Controller
Zilog
22
DS97TEL1902
FUNCTIONAL DESCRIPTION
(Continued)
HALT Mode.
The Z90102/3/4 is driven by two internal
clocks, TCLK and SCLK. They both oscillate at the crystal
frequency. TCLK provides the clock signal for the counter-
timers and the interrupt block. SCLK provides the clock
signal for all other CPU blocks. HALT Mode turns off the
internal CPU clock (SCLK), but not the XTAL oscillation.
The counter/timers and external interrupts remain active.
The device may be recovered by interrupts, either exter-
nally or internally generated. An interrupt request may be
executed (enabled) to exit HALT Mode. After the interrupt
service routine, the program continues from the instruction
after the HALT.
STOP Mode.
The STOP instruction stops crystal oscilla-
tion, thereby stopping both SCLK and TCLK. The device
ceases to operate. The STOP Mode can be released by
two methods. The first method is to reset the device. A
high input condition on Port 3 P30 is the second method.
After releasing the STOP Mode by using either one of the
two methods, program execution begins at location
000CH. To complete an instruction prior to entering the
standby modes, a NOP instruction has to be placed before
the HALT or STOP instructions. This is required because
of instruction pipelining, i.e.:
Notes:
In STOP Mode, XTAL2 pin has an internal pull-up
on it and OSCOUT has an internal pull-down.
Clock.
The Z90102/3/4 on-chip oscillator has a high-gain,
parallel-resonant amplifier for connection to a crystal, ce-
ramic resonator, or any suitable external clock source
(XTAL1 = Input, XTAL2 = Output). The crystal is an AT cut,
parallel resonant, 4 MHz max with a series resistance (RS)
less than or equal to 100 Ohms.
The crystal source is connected across XTAL1 and XTAL2
using the crystal manufacturer's recommended capacitors
(10 pF < CL < 300 pF, where C1=C2=CL) from each pin to
device ground (Figure 20).
FF NOP
6F STOP
; clear the pipeline
; enter STOP Mode
or
; clear the pipeline
; enter HALT Mode
FF NOP
7F HALT
Figure 20. Oscillator Configuration
XTAL1
XTAL2
C1
C2
33pF
33pF
XTAL1
XTAL2
XTAL1
XTAL2
Ceramic Resonator
or Crystal
External Clock
27
m
H
6.8k
W
MPU
LC Oscillator Circuits
* VSS
* VSS
* VSS
* VSS
* Must be connected to VSS pin and not
system ground.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Z9010304PSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| Z90104 | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:40-Pin Low-Cost Digital Television Controller |
| Z9010404PSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| Z9010404PSGRXXX | 功能描述:8位微控制器 -MCU Z8 DTC 8K ROM (L/F) RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| Z90110 | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:40-PIN LOW-COST DIGITAL TELEVISION CONTROLLER |
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