參數(shù)資料
型號(hào): ZL30415
廠商: Zarlink Semiconductor Inc.
英文描述: SONET/SDH Clock Multiplier PLL
中文描述: SONET / SDH的時(shí)鐘倍頻鎖相環(huán)
文件頁數(shù): 20/23頁
文件大小: 347K
代理商: ZL30415
ZL30415
Data Sheet
20
Zarlink Semiconductor Inc.
Typical figures are for design aid only: not guaranteed and not subject to production testing.
Loop Filter components: R
F
= 8.2 k
,
C
F
= 470 nF.
Performance Characteristics: Output Jitter Generation (LVPECL: 19.44 MHz, 38.88 MHz, 77.76 MHz,
155.52 MHz, and 622.08 MHz and CMOS: 19.44 MHz) - ETSI EN 300 462-7-1 conformance
-
(V
CC
= 3.3 V ±10%; T
A
= -40 to 85
°
C)
EN 300 462-7-1 Jitter Generation Requirements
ZL30415 Jitter Generation Performance
Interface
Jitter
Measurement
Filter
Limit in
UI
Equivalent
limit in time
domain
Typ.
Max.
Units
1
STM-4
250 kHz to 5 MHz
0.1 UIpp
161
30
ps
P-P
ps
RMS
ps
P-P
ps
RMS
ps
P-P
ps
RMS
ps
P-P
ps
RMS
ps
P-P
ps
RMS
ps
P-P
ps
RMS
-
-
1.5
3
1 kHz to 5 MHz
0.5 UIpp
804
80
-
-
4
8
2
STM-1
optical
65 kHz to 1.3 MHz
0.1 UIpp
643
31
-
-
1.6
3.1
500 Hz to 1.3 MHz
0.5 UIpp
3215
100
-
-
5
10
3
STM-1
electrical
65 kHz to 1.3 MHz
0.075 UIpp
482
31
-
-
1.6
3.1
500 Hz to 1.3 MHz
0.5 UIpp
3215
100
-
-
5
10
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