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參數(shù)資料
| 型號： | ZL50018QCC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 路由/交換 |
| 英文描述： | 2 K Digital Switch with Enhanced Stratum 3 DPLL |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PQFP256 |
| 封裝： | 28 X 28 MM, 1.40 MM HEIGHT, MS-026BJC, LQFP-256 |
| 文件頁數(shù)： | 42/136頁 |
| 文件大?。?/td> | 1448K |
| 代理商： | ZL50018QCC |
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ZL50018
Data Sheet
42
Zarlink Semiconductor Inc.
With a preferred reference, if more than two references are required, or the two references are not in consecutive
order, or the roles of the two references need to be interchanged, then external software is required to manually
control the reference switching of the DPLL (by monitoring the reference failure status and reprogramming the
device accordingly).
12.1.4 Freerun Mode
In freerun mode, the DPLL generates a fixed output frequency based on the crystal oscillator and a programmed
centre frequency. To meet Stratum 3, the accuracy of the circuitry for the freerunning output clock must be 4.6 ppm
or better. The circuit’s freerun accuracy is better than 0.003 ppm.
In freerun mode, the DPLL does not lock to any reference. It is important that the device is not simultaneously in
freerun mode (see the RCCR Register) and fast lock mode (see the BWCR Register). Otherwise, the output frame
pulse may not be generated correctly.
12.1.5 Software Controlled Mode
When the DPLL is in the freerun mode, it can be put into software controlled mode by enabling the SWE (bit 3) in
the DPLL Control Register (DPLLCR). The Software Delta Frequency Register (SWDFR) contains the frequency
offset to which the DPLL outputs will move. If SWF (bit 4) in the DPLL Control Register (DPLLCR) is low, the DPLL
outputs will gradually move to the given frequency offset, with the speed defined by the DPLL internal filter and
phase alignment speed (phase slope) limiter. If SWF (bit 4) is high, the DPLL outputs will reach the Software Delta
Frequency Register (SWDFR) frequency offset immediately after it is written, allowing an external software-based
filter and phase alignment speed (phase slope) limiter to be used. When SWE (bit 3) is low or the DPLL is not in the
freerun mode, the value of Software Delta Frequency Register (SWDFR) will be ignored. For detailed description of
the DPLL Control Register (DPLLCR) bits and the Software Delta Frequency Register (SWDFR) bits see Table 29
on page 65, and Table 33 on page 70, respectively.
12.1.6 DPLL Internal Reset Mode
DPLL_IRM (bit 0) in the DPLL Control Register (DPLLCR) enables the internal reset mode. In the internal reset
mode, the DPLL module is disabled to save power. The circuit will be reset continuously and no output clocks will
be generated. When the internal DPLL module is in the internal reset mode, all registers remain accessible. Note
that applying the DPLL reset does not reset the DPLL registers: they preserve the values that they had prior to
entering reset.
13.0 DPLL Frequency Behaviour
13.1 Input Frequencies
The DPLL is capable of synchronizing to one of the following input frequencies:
8 kHz
1.544 MHz (DS1)
2.048 MHz (E1)
4.096 MHz
8.192 MHz
16.384 MHz
19.44 MHz
Table 9 - DPLL Input Reference Frequencies
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相關(guān)代理商/技術(shù)參數(shù) |
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| ZL50018QCG1 | 制造商:Microsemi Corporation 功能描述:PB FREE 2K+ RATE CONVERSION AND S3 DPLL - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 2K-CH ENH 256LQFP |
| ZL50019 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 2 K Digital Switch with Stratum 4E DPLL |
| ZL50019_06 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 2 K Digital Switch with Stratum 4E DPLL |
| ZL50019GAC | 制造商:Microsemi Corporation 功能描述:2K WITH RATE CONVERSION AND S4 - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 2K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 2K-CH ENH 256PBGA |
| ZL50019GAG2 | 制造商:Microsemi Corporation 功能描述:PB FREE 2K WITH RATE CONVERSION+S4E DPLL 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 2K X 2K 1.8V/3.3V 256BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 2K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 2K-CH ENH 256PBGA |
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