參數(shù)資料
型號： ZL50023QCC
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 路由/交換
英文描述： Enhanced 4 K Digital Switch
中文描述： TELECOM, DIGITAL TIME SWITCH, PQFP256
封裝： 28 X 28 MM, 1.40 MM HEIGHT, MS-026BJC, LQFP-256
文件頁數(shù)： 77/80頁
文件大小： 1341K
代理商： ZL50023QCC
ZL50023
Data Sheet
77
Zarlink Semiconductor Inc.
AC Electrical Characteristics
- Divided Clock Mode Output Timing
Characteristics are over recommended operating conditions unless otherwise stated.
AC Electrical Characteristics
- Multiplied Clock Mode Output Timing
Characteristics are over recommended operating conditions unless otherwise stated.
Figure 40 - Output Timing (ST-BUS Format)
Characteristic
Sym.
Min.
Max.
Units
1
CKo0 to CKo1 (8.192 MHz) delay
t
C1D
t
C2D
t
C3D
-1
2
ns
2
CKo0 to CKo2 (16.384 MHz) delay
-1
3
ns
3
CKo0 to CKo3 (16.384 MHz/8.192 MHz/4.096 MHz) delay
-2
2
ns
Characteristic
Sym.
Min.
Max.
Units
1
CKo0 to CKo1 (8.192 MHz) delay
t
C1D
t
C2D
t
C3D
-1
2
ns
2
CKo0 to CKo2 (16.384 MHz) delay
-1
3
ns
3
CKo0 to CKo3
(32.768 MHz/16.384 MHz/8.192 MHz/4.096 MHz) delay
-1
3
ns
FPo0
CKo1
(8.192 MHz)
CKo0
(4.096 MHz)
V
CT
CKo2
(16.384 MHz)
CKo3
(32.768 MHz)
V
CT
V
CT
V
CT
t
C1D
t
C2D
t
C3D
V
CT
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