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參數(shù)資料
| 型號： | ZXCW6100 |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 420K |
| 代理商： | ZXCW6100 |
PIN FUNCTIONAL DESCRIPTIONS
SPI interface
Pins SPI-EN, SPI-DA, SPI-CK form the SPIinterface.The
enable, SPI-EN, is active low. Data is transmitted on
SPI-DA as a 72 bit word, there are 8 control bits and 64
data bits, SPI-CK provides the clock for the SPI
interface. The function of the control and data bits is
detailed in the Register Description section. The SPI
interface is also bi-directional with the read/write
function set in the first 8 control bits.
In write mode (figure 1) a full 72 bits is sent from the
hostcontrollerconsisting ofthe8preamblecontrolbits
with the R/W bit set low and the 64 SPI data bits. The
SPI-EN signal must be held low, enabled, for all 72
clocks and data bits as a validity check is run on the
incoming data string and any string not 72 bit long is
rejected. It is recommended to perform a read back of
the SPI data registers to validate the receipt of the
correct instruction.
In read mode (figure 2) the host controller sends the
first 8 preamble control bits with the R/W bit set high.
The SPI-DA pin of the ZXCW6100 device changes state
from being an input to being an output on the falling
edge following the R/W bit. The device then reads out
the data from the internal SPIregister onto the SPI-DA
wire.
Data can be sent to SPI interface using two methods -
burstmode orcontinuos mode. In burstmode data will
besentas asingle72bitSPIdatawordaccompaniedby
72 SPI-CK clock bits. This data would be sent as and
when operating parameters are required to be
changed.
In continuous mode the S PI-CK clock will run
continuously with the SPI-DA data being resent
regardless of whether operating parameters are
required to be changed or not. The only requirement
for this mode, or for burst mode, as regard the
frequency ofSPIupdate is thatthe SPI-EN enable line is
returned high for a minimum of 3 M-CK master clock
cycles between SPI data words.
The SPI interface can operate asynchronously to the
M-CK master clock and to any other data inputs. It can
run up to a maximum of40MHzhowever, itis expected
that one eighth the M-CK clock frequency would be
normal for most requirements.
ZXCW6100S28
S E M IC O N D U C T O R S
ISSUE 2 - FEBRUARY 2004
12
SPI Interface - Write Mode (figure 1)
SPI Interface - Read Mode (figure 2)
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相關代理商/技術參數(shù) |
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| ZXCW6100S28 | 功能描述:IC AMP AUDIO STEREO 25BIT 28SSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 音頻放大器 系列:Acoustar™, NOVALOAD™ 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:DirectDrive® 類型:H 類 輸出類型:耳機，2-通道（立體聲） 在某負載時最大輸出功率 x 通道數(shù)量:35mW x 2 @ 16 歐姆 電源電壓:1.62 V ~ 1.98 V 特點:I²C，麥克風，靜音，短路保護，音量控制 安裝類型:表面貼裝 供應商設備封裝:25-WLP（2.09x2.09） 封裝/外殼:25-WFBGA，WLCSP 包裝:帶卷 (TR) |
| ZXCW6100S28_04 | 制造商:ZETEX 制造商全稱:ZETEX 功能描述:24 BIT STEREO DIRECT DRIVE DIGITAL AUDIO AMPLIFIER |
| ZXCW6100S28TC | 功能描述:音頻放大器 24Bit Amp RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| ZXCW8100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32 BIT STEREO DIRECT DRIVE DIGITAL AUDIO AMPLIFIER |
| ZXCW8100S28 | 制造商:ZETEX 制造商全稱:ZETEX 功能描述:32 BIT STEREO DIRECT DRIVE DIGITAL AUDIO AMPLIFIER |
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