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參數(shù)資料
| 型號(hào)： | ZXCW6100 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大?。?/td> | 420K |
| 代理商： | ZXCW6100 |
Mute
Muteis enabledwiththeMUTE pin.Muteis activelow.
Master clock
The system master clock is applied to pin M-CK
Output drive
Output drive is provided on 8 pins, 4 each for left and
right. For each channel the pins are OP1 to OP4 then L
or R. OP1 and OP2 as a pair drive the gates of an N & P
channel MOSFET pair through a gate drive buffer that
includes deadtimecontrol.OP3andOP4driveasimilar
pair. These pairs in turn drive a BTL (bridge tied load)
loudspeaker–see the Typical Applications Diagram for
details. Timing diagrams are shown in the AC
Characteristics section.
Mode (dead/no dead time)
MODE0 and MODE1 are used to set the operating
mode of the ZXCW6100 device. There are two modes
available, direct drive with and without dead time.
Without dead time the output stage on and off
switching to the N and P channel MOSFETs occurs at
the same time. The usercan then design any dead time
or cross conduction into the output stage as required
by the characteristics of the MOSFET being used.
When dead time is selected a delay is introduced
between the N and P channel MOSFET switching such
that the active MOSFET is switched off before the
inactive MOSFET is switched on. This is particularly
useful where MOSFETs have a slow turn off time and
might otherwise give a large amount of cross
conduction in the N and P channel MOSFET pair.
Dead time is a function of the master clock frequency
and is effectively a half the master clock rate. For the
nominal 33MHz master clock, dead time is therefore
approximately 15ns.
Whilst this digital dead time is available it is
recommended for most applications that shorter
periods of dead time are used by including dead time
control within the FET drive buffer circuit.
SPI REGISTER SUMMARY
The following indicates the general structure of the 72
bit SPI word used for control and data.
Control
SPI preamble:
ca1 ca0 1 00011
ca1 ca0 1 00010
read
write
Bits ca1 and ca0 should be setlow. The next4 bits are a
silicon reference to the ZXCW6100 part number. The
othertwo bits determine ifthe SPIinterface is in read or
write modes.
ZXCW6100S28
S E M IC O N D U C T O R S
ISSUE 2 - FEBRUARY 2004
14
Operating mode
MODE0 pin
MODE1 pin
Direct drive no
dead time
0
0
Direct drive
with dead time
1
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZXCW6100S28 | 功能描述:IC AMP AUDIO STEREO 25BIT 28SSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 音頻放大器 系列:Acoustar™, NOVALOAD™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:DirectDrive® 類型:H 類 輸出類型:耳機(jī)，2-通道（立體聲） 在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量:35mW x 2 @ 16 歐姆 電源電壓:1.62 V ~ 1.98 V 特點(diǎn):I²C，麥克風(fēng)，靜音，短路保護(hù)，音量控制 安裝類型:表面貼裝 供應(yīng)商設(shè)備封裝:25-WLP（2.09x2.09） 封裝/外殼:25-WFBGA，WLCSP 包裝:帶卷 (TR) |
| ZXCW6100S28_04 | 制造商:ZETEX 制造商全稱:ZETEX 功能描述:24 BIT STEREO DIRECT DRIVE DIGITAL AUDIO AMPLIFIER |
| ZXCW6100S28TC | 功能描述:音頻放大器 24Bit Amp RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| ZXCW8100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32 BIT STEREO DIRECT DRIVE DIGITAL AUDIO AMPLIFIER |
| ZXCW8100S28 | 制造商:ZETEX 制造商全稱:ZETEX 功能描述:32 BIT STEREO DIRECT DRIVE DIGITAL AUDIO AMPLIFIER |
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