參數(shù)資料
型號: μPD78052(A)
廠商: NEC Corp.
英文描述: 8 Bit Single Chip Microcontrollers(8位單片微控制器)
中文描述: 8位單片機微控制器(8位單片微控制器)
文件頁數(shù): 52/76頁
文件大小: 386K
代理商: ΜPD78052(A)
52
μ
PD78052(A), 78053(A), 78054(A)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
t
KCY6
V
DD
= 2.7 to 6.0 V
1600
ns
3200
ns
t
KH6
V
DD
= 2.7 to 6.0 V
650
ns
1300
ns
t
KL6
V
DD
= 2.7 to 6.0 V
800
ns
1600
ns
t
SIK6
100
ns
t
KSI6
t
KCY6
/2
ns
t
KSO6
V
DD
= 4.5 to 6.0 V
0
300
ns
0
500
ns
SCK0 rise, fall time
t
R6
, t
F6
When using external device
expansion function
160
ns
When not using external
device expansion function
1000
ns
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
t
KCY5
R = 1 k
,
V
DD
= 2.7 to 6.0 V
1600
ns
C = 100 pF
Note
3200
ns
t
KH5
V
DD
= 2.7 to 6.0 V
t
KCY5
/2–160
ns
t
KCY5
/2–190
ns
t
KL5
V
DD
= 4.5 to 6.0 V
t
KCY5
/2–50
ns
t
KCY5
/2–100
ns
t
SIK5
4.5 V
V
DD
6.0 V
300
ns
2.7 V
V
DD
<
4.5 V
350
ns
400
ns
t
KSI5
600
ns
t
KSO5
0
300
ns
(vi) 2-wire serial I/O mode (SCK0... External clock input)
SCK0 low-level width
SB0, SB1 setup time
(to SCK0
)
SB0, SB1 hold time
(from SCK0
)
SB0, SB1 output delay
time from SCK0
R = 1 k
,
C = 100 pF
Note
(v) 2-wire serial I/O mode (SCK0... Internal clock output)
SCK0 cycle time
SCK0 high-level width
SCK0 low-level width
SB0, SB1 setup time
(to SCK0
)
SB0, SB1 hold time
(from SCK0
)
SB0, SB1 output delay
time from SCK0
Note
R and C are the load resistance and load capacitance of the SCK0 and SB0, SB1 output lines.
Note
R and C are the load resistance and load capacitance of the SB0, SB1 output line.
SCK0 cycle time
SCK0 high-level width
相關(guān)PDF資料
PDF描述
μPD78053(A) 8 Bit Single Chip Microcontrollers(8位單片微控制器)
μPD78054(A) 8 Bit Single Chip Microcontrollers(8位單片微控制器)
μPD78056FY 8 Bit Single Chip Microcontrollers
μPD78058FY 8 Bit Single Chip Microcontrollers
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