參數(shù)資料
型號: μPD78054(A)
廠商: NEC Corp.
英文描述: 8 Bit Single Chip Microcontrollers(8位單片微控制器)
中文描述: 8位單片機(jī)微控制器(8位單片微控制器)
文件頁數(shù): 49/76頁
文件大?。?/td> 386K
代理商: ΜPD78054(A)
49
μ
PD78052(A), 78053(A), 78054(A)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
4.5 V
V
DD
6.0 V
800
ns
2.7 V
V
DD
<
4.5 V
1600
ns
3200
ns
t
KH1
, t
KL1
V
DD
= 4.5 to 6.0 V
t
KCY1
/2–50
ns
t
KCY1
/2–100
ns
t
SIK1
4.5 V
V
DD
6.0 V
100
ns
2.7 V
V
DD
<
4.5 V
150
300
ns
ns
t
KSI1
400
ns
300
ns
SCK0 cycle time
SCK0 high-/low-level
width
(3) SERIAL INTERFACE (T
A
= –40 to +85
°
C, V
DD
= 2.0 to 6.0 V)
(a) Serial interface channel 0
(i)
3-wire serial I/O mode (SCK0... Internal clock output)
C = 100 pF
Note
t
KSO1
Note
C is the load capacitance of SO0 output line.
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
4.5 V
V
DD
6.0 V
800
ns
2.7 V
V
DD
<
4.5 V
1600
ns
3200
ns
t
KH2
, t
KL2
4.5 V
V
DD
6.0 V
400
ns
2.7 V
V
DD
<
4.5 V
800
ns
1600
ns
t
SIK2
100
ns
t
KSI2
400
ns
300
ns
SCK0 rise, fall time
t
R2
, t
F2
When using external device
expansion function
160
ns
When not using external
device expansion function
1000
ns
SCK0 cycle time
SCK0 high-/low-level
width
SO0 output delay time
from SCK0
C = 100 pF
Note
t
KSO2
SI0 hold time (from
SCK0
)
SI0 setup time (to SCK0
)
t
KCY1
t
KCY2
Note
C is the load capacitance of SO0 output line.
(ii) 3-wire serial I/O mode (SCK0... External clock input)
SI0 hold time (from
SCK0
)
SO0 output delay time
from SCK0
SI0 setup time
(to SCK0
)
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