24
LIST OF FIGURES (2/8)
Figure No.
Title
Page
7-4
7-5
7-6
7-7
7-8
7-9
7-10
Oscillation Mode Selection Register Format.....................................................................................
Main System Clock Waveform due to Writing to OSMS ...................................................................
External Circuit of Main System Clock Oscillator..............................................................................
External Circuit of Subsystem Clock Oscillator.................................................................................
Examples of Resonator with Incorrect Connection ...........................................................................
Main System Clock Stop Function ....................................................................................................
System Clock and CPU Clock Switching ..........................................................................................
159
160
161
162
162
166
169
8-1
8-2
8-3
8-4
8-5
8-6
8-7
8-8
8-9
8-10
8-11
8-12
8-13
8-14
8-15
8-16
8-17
16-Bit Timer/Event Counter Block Diagram ......................................................................................
16-Bit Timer/Event Counter Output Control Circuit Block Diagram ..................................................
Timer Clock Selection Register 0 Format .........................................................................................
16-Bit Timer Mode Control Register Format .....................................................................................
Capture/Compare Control Register 0 Format ...................................................................................
16-Bit Timer Output Control Register Format ...................................................................................
Port Mode Register 3 Format ...........................................................................................................
External Interrupt Mode Register 0 Format ......................................................................................
Sampling Clock Select Register Format ...........................................................................................
Control Register Settings for Interval Timer Operation .....................................................................
Interval Timer Configuration Diagram ...............................................................................................
Interval Timer Operation Timings ......................................................................................................
Control Register Settings for PWM Output Operation ......................................................................
Example of D/A Converter Configuration with PWM Output .............................................................
TV Tuner Application Circuit Example ..............................................................................................
Control Register Settings for PPG Output Operation .......................................................................
Control Register Settings for Pulse Width Measurement with Free-Running Counter and
One Capture Register .......................................................................................................................
Configuration Diagram for Pulse Width Measurement by Free-Running Counter ............................
Timing of Pulse Width Measurement Operation by Free-Running Counter and One Capture
Register (with Both Edges Specified) ...............................................................................................
Control Register Settings for Two Pulse Width Measurements with Free-Running Counter ............
Timing of Pulse Width Measurement Operation with Free-Running Counter
(with Both Edges Specified)..............................................................................................................
Control Register Settings for Pulse Width Measurement with Free-Running Counter and
Two Capture Registers .....................................................................................................................
Timing of Pulse Width Measurement Operation by Free-Running Counter and Two Capture
Registers (with Rising Edge Specified).............................................................................................
Control Register Settings for Pulse Width Measurement by Means of Restart ................................
Timing of Pulse Width Measurement Operation by Means of Restart
(with Rising Edge Specified) .............................................................................................................
Control Register Settings in External Event Counter Mode ..............................................................
External Event Counter Configuration Diagram................................................................................
External Event Counter Operation Timings (with Rising Edge Specified) ........................................
Control Register Settings in Square-Wave Output Mode .................................................................
Square-Wave Output Operation Timing............................................................................................
175
176
179
181
182
183
184
185
186
187
188
188
190
191
191
192
193
194
8-18
8-19
194
195
8-20
8-21
196
8-22
197
8-23
198
199
8-24
8-25
199
200
201
201
202
203
8-26
8-27
8-28
8-29
8-30