25
LIST OF FIGURES (3/8)
Figure No.
Title
Page
8-31
8-32
8-33
8-34
8-35
8-36
8-37
8-38
Control Register Settings for One-Shot Pulse Output Operation Using Software Trigger ................
Timing of One-Shot Pulse Output Operation Using Software Trigger...............................................
Control Register Settings for One-Shot Pulse Output Operation Using External Trigger .................
Timing of One-Shot Pulse Output Operation Using External Trigger (with Rising Edge Specified)..
16-Bit Timer Register Start Timing ....................................................................................................
Timings After Change of Compare Register during Timer Count Operation .....................................
Capture Register Data Retention Timing ..........................................................................................
Operation Timing of OVF0 Flag ........................................................................................................
204
205
206
207
208
208
209
210
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
9-9
9-10
9-11
9-12
9-13
9-14
9-15
9-16
8-Bit Timer/Event Counter Block Diagram ........................................................................................
Block Diagram of 8-Bit Timer/Event Counter Output Control Circuit 1 .............................................
Block Diagram of 8-Bit Timer/Event Counter Output Control Circuit 2 .............................................
Timer Clock Select Register 1 Format ..............................................................................................
8-Bit Timer Mode Control Register Format .......................................................................................
8-Bit Timer Output Control Register Format .....................................................................................
Port Mode Register 3 Format ...........................................................................................................
Interval Timer Operation Timings ......................................................................................................
External Event Counter Operation Timings (with Rising Edge Specified) ........................................
Square-Wave Output Operation Timing............................................................................................
Interval Timer Operation Timing........................................................................................................
External Event Counter Operation Timings (with Rising Edge Specified) ........................................
Square-Wave Output Operation Timing............................................................................................
8-Bit Timer Registers Start Timing ....................................................................................................
Event Counter Operation Timing ......................................................................................................
Timing After Compare Register Change During Timer Count Operation ..........................................
217
218
218
221
222
223
224
225
228
230
231
233
235
236
236
237
10-1
10-2
10-3
Watch Timer Block Diagram .............................................................................................................
Timer Clock Select Register 2 Format ..............................................................................................
Watch Timer Mode Control Register Format ....................................................................................
241
242
243
11-1
11-2
11-3
Watchdog Timer Block Diagram .......................................................................................................
Timer Clock Select Register 2 Format ..............................................................................................
Watchdog Timer Mode Register Format ...........................................................................................
247
249
250
12-1
12-2
12-3
12-4
Remote Controlled Output Application Example...............................................................................
Clock Output Control Circuit Block Diagram .....................................................................................
Timer Clock Select Register 0 Format ..............................................................................................
Port Mode Register 3 Format ...........................................................................................................
253
254
255
256
13-1
13-2
13-3
Buzzer Output Control Circuit Block Diagram...................................................................................
Timer Clock Select Register 2 Format ..............................................................................................
Port Mode Register 3 Format ...........................................................................................................
257
259
260