15
5.2
Processor Registers............................................................................................................ 110
5.2.1
Control registers ........................................................................................................................ 110
5.2.2
General registers....................................................................................................................... 113
5.2.3
Special function register (SFR) ................................................................................................ 114
Instruction Address Addressing ....................................................................................... 118
5.3.1
Relative addressing................................................................................................................... 118
5.3.2
Immediate addressing ............................................................................................................... 119
5.3.3
Table indirect addressing.......................................................................................................... 120
5.3.4
Register addressing .................................................................................................................. 121
Operand Address Addressing ........................................................................................... 122
5.4.1
Implied addressing .................................................................................................................... 122
5.4.2
Register addressing .................................................................................................................. 123
5.4.3
Direct addressing ...................................................................................................................... 124
5.4.4
Short direct addressing ............................................................................................................. 125
5.4.5
Special function register (SFR) addressing ............................................................................. 126
5.4.6
Register indirect addressing ..................................................................................................... 127
5.4.7
Based addressing...................................................................................................................... 128
5.4.8
Based indexed addressing ....................................................................................................... 129
5.4.9
Stack addressing ....................................................................................................................... 129
5.3
5.4
CHAPTER 6 PORT FUNCTIONS......................................................................................................... 131
6.1
Port Functions...................................................................................................................... 131
6.2
Port Configuration ............................................................................................................... 136
6.2.1
Port 0 ......................................................................................................................................... 136
6.2.2
Port 1 ......................................................................................................................................... 138
6.2.3
Port 2 (
μ
PD78078 Subseries)................................................................................................... 139
6.2.4
Port 2 (
μ
PD78078Y Subseries) ................................................................................................ 141
6.2.5
Port 3 ......................................................................................................................................... 143
6.2.6
Port 4 ......................................................................................................................................... 144
6.2.7
Port 5 ......................................................................................................................................... 145
6.2.8
Port 6 ......................................................................................................................................... 146
6.2.9
Port 7 ......................................................................................................................................... 148
6.2.10
Port 8 ......................................................................................................................................... 150
6.2.11
Port 9 ......................................................................................................................................... 151
6.2.12
Port 10 ....................................................................................................................................... 153
6.2.13
Port 12 ....................................................................................................................................... 155
6.2.14
Port 13 ....................................................................................................................................... 156
6.3
Port Function Control Registers ....................................................................................... 157
6.4
Port Function Operations ................................................................................................... 163
6.4.1
Writing to input/output port ....................................................................................................... 163
6.4.2
Reading from input/output port ................................................................................................. 163
6.4.3
Operations on input/output port................................................................................................ 163
6.5
Selection of Mask Option ................................................................................................... 164