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TABLE (1/2)
Table. No.
Title
Page
1-1
Differences between the
μ
PD78081, 78082 and 78P083, the
μ
PD78081(A), 78082(A)
and 78P083(A), and the
μ
PD78081(A2) ............................................................................
13
2-1
Type of Input/Output Circuit of Each Pin ............................................................................
22
3-1
3-2
3-2
Vector Table........................................................................................................................
Special-Function Register List (1/2) ..................................................................................
Special-Function Register List (2/2) ...................................................................................
28
38
39
4-1
4-2
4-3
Port Functions ....................................................................................................................
Port Configuration ..............................................................................................................
Port Mode Register and Output Latch Settings when Using Dual-Fucntions .....................
54
55
64
5-1
5-2
Clock Generator Configuration ...........................................................................................
Maximum Time Required for CPU Clock Switchover .........................................................
69
77
6-1
6-2
6-3
6-4
6-5
6-6
Timer/Event Counter Types and Functions ........................................................................
8-Bit Timer/Event Counters 5 and 6 Interval Times ............................................................
8-Bit Timer/Event Counters 5 and 6 Square-Wave Output Ranges ...................................
8-Bit Timer/Event Counters 5 and 6 Configurations ...........................................................
8-Bit Timer/Event Counters 5 and 6 Interval Times ............................................................
8-Bit Timer/Event Counters 5 and 6 Square-Wave Output Ranges ...................................
79
80
81
82
92
95
7-1
7-2
7-3
7-4
7-5
Watchdog Timer Overrun Detection Times.........................................................................
Interval Times .....................................................................................................................
Watchdog Timer Configuration ...........................................................................................
Watchdog Timer Overrun Detection Time ..........................................................................
Interval Timer Interval Time ................................................................................................
103
104
105
109
110
8-1
Clock Output Control Circuit Configuration ........................................................................
112
9-1
Buzzer Output Control Circuit Configuration ......................................................................
115
10-1
A/D Converter Configuration ..............................................................................................
119
11-1
11-2
11-3
11-4
11-5
11-6
11-7
Serial Interface Channel 2 Configuration ...........................................................................
Serial Interface Channel 2 Operating Mode Settings .........................................................
Relation between Main System Clock and Baud Rate .......................................................
Relation between ASCK Pin Input Frequency and Baud Rate (When BRGC is set to 00H)
Relation between Main System Clock and Baud Rate .......................................................
Relation between ASCK Pin Input Frequency and Baud Rate (When BRGC is set to 00H)
Receive Error Causes ........................................................................................................
136
142
146
147
155
156
161