參數(shù)資料
型號(hào): μPD78F0034Y
廠商: NEC Corp.
元件分類: 8位微控制器
英文描述: 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
中文描述: 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存
文件頁(yè)數(shù): 36/52頁(yè)
文件大?。?/td> 309K
代理商: ΜPD78F0034Y
Preliminary Data Sheet
36
m
PD78F0034Y
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Resolution
10
10
10
bit
Overall error
Note
AV
REF
= 4.5 to 5.5 V
±0.4
%
±0.7
%
Conversion time
T
CONV
AV
REF
= 4.5 to 5.5 V
14
200
m
s
20
200
m
s
Analog input voltage
V
IAN
0
AV
REF
+ 0.3
V
Reference voltage
AV
REF
2.7
AV
DD
V
AV
REF
resistance
R
AIREF
10
20
k
W
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Data retention power
supply voltage
V
DDDR
1.6
5.5
V
Data retention
power supply
current
I
DDDR
V
DDDR
= 1.6 V
Subsystem clock stops and feed-back resistor
disconnected
0.1
10
m
A
Release signal set time
t
SREL
0
m
s
Oscillation stabilization
wait time
t
WAIT
Release by RESET
2
17
/fx
ms
Release by interrupt request
Note
ms
A/D Converter Characteristics (T
A
= –40 to 85°C, V
DD
= AV
DD
= AV
REF
= 2.7 to 5.5 V, AV
SS
= V
SS
= 0 V)
Note
Excluding quantization error (±1/2LSB). Shown as a percentage of the full scale value.
Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (T
A
= –40 to +85°C)
Note
Selection of 2
12
/f
X
and 2
14
/f
X
to 2
17
/f
X
is possible with bits 0 to 2 (OSTS0 to OSTS2) of the oscillation
stabilization time select register (OSTS).
Data Retention Timing (STOP Mode Release by RESET)
t
SREL
t
WAIT
V
DD
RESET
STOP Mode
Data Retention Mode
Internal Reset Operation
HALT Mode
Operating Mode
V
DDDR
STOP Instruction Execution
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