32
LIST OF FIGURES (8/8)
Figure No.
Title
Page
23-3.
23-4.
23-5.
HALT Mode Release by RESET Input...........................................................................................
STOP Mode Release by Interrupt Request Generation ................................................................
Release by STOP Mode RESET Input..........................................................................................
529
531
532
24-1.
24-2.
24-3.
24-4.
Block Diagram of Reset Function..................................................................................................
Timing of Reset Input by RESET Input..........................................................................................
Timing of Reset due to Watchdog Timer Overflow ........................................................................
Timing of Reset Input in STOP Mode by RESET Input .................................................................
533
534
534
534
25-1.
25-2.
25-3.
25-4.
25-5.
25-6.
25-7.
25-8.
25-9.
25-10.
Block Diagram of ROM Correction ................................................................................................
Correction Address Registers 0 and 1 Format ..............................................................................
Correction Control Register Format ..............................................................................................
Storing Example to EEPROM (when one place is corrected) .......................................................
Connecting Example with EEPROM (using 2-wire serial I/O mode) .............................................
Initialization Routine ......................................................................................................................
ROM Correction Operation............................................................................................................
ROM Correction Example .............................................................................................................
Program Transition Diagram (when one place is corrected) .........................................................
Program Transition Diagram (when two places are corrected) .....................................................
537
538
539
540
540
541
542
543
544
545
26-1.
26-2.
26-3.
26-4.
26-5.
26-6.
26-7.
26-8.
Memory Size Switching Register Format (
μ
PD78P054) ...............................................................
Memory Size Switching Register Format (
μ
PD78P058) ...............................................................
Internal Expansion RAM Size Switching Register Format ............................................................
Page Program Mode Flowchart.....................................................................................................
Page Program Mode Timing..........................................................................................................
Byte Program Mode Flowchart......................................................................................................
Byte Program Mode Timing...........................................................................................................
PROM Read Timing ......................................................................................................................
549
550
551
554
555
556
557
558
B-1.
B-2.
B-3.
B-4.
Development Tool Configuration ...................................................................................................
EV-9200GC-80 Drawing (For Reference Only) .............................................................................
EV-9200GC-80 Footprint (For Reference Only) ............................................................................
TGK-080SDW Drawing (For Reference) (unit: mm)......................................................................
580
590
591
592