ters. Each PWM o" />
參數(shù)資料
型號(hào)： 101-0517
廠商： Rabbit Semiconductor
文件頁(yè)數(shù)： 3/110頁(yè)
文件大小： 0K
描述： MODULE RABBITCORE RCM3100
標(biāo)準(zhǔn)包裝： 1
系列： RabbitCore®
模塊/板類型： MPU 核心模塊
適用于相關(guān)產(chǎn)品： RCM3100
其它名稱： 316-1021
94
RabbitCore RCM3100
E.4 PWM Outputs
The Pulse-Width Modulator consists of a 10-bit free-running counter and four width regis-
ters. Each PWM output is high for n + 1 counts out of the 1024-clock count cycle, where n
is the value held in the width register. The PWM output high time can optionally be spread
throughout the cycle to reduce ripple on the externally filtered PWM output. The PWM is
clocked by the output of Timer A9. The spreading function is implemented by dividing
each 1024-clock cycle into four quadrants of 256 clocks each. Within each quadrant, the
Pulse-Width Modulator uses the eight MSBs of each pulse-width register to select the base
width in each of the quadrants. This is the equivalent to dividing the contents of the pulse-
width register by four and using this value in each quadrant. To get the exact high time, the
Pulse-Width Modulator uses the two LSBs of the pulse-width register to modify the high
time in each quadrant according to Table E-3 below. The “n/4” term is the base count, and
is formed from the eight MSBs of the pulse-width register.
The diagram below shows a PWM output for several different width values for both
modes of operation. Operation in the spread mode reduces the filtering requirements on
the PWM output in most cases.
Figure E-1. PWM Outputs for Various Normal and Spread Modes
Table E-3. PWM Outputs
Pulse Width LSBs
1st
2nd
3rd
4th
00
n/4 + 1
n/4
01
n/4 + 1
n/4
n/4 + 1
n/4
10
n/4 + 1
n/4
11
n/4 + 1
n=255, normal
n=256, spread
n=255, spread
(256 counts)
(64 counts)
(65 counts)
(64 counts)
(64 counts)
(64 counts)
n=257, spread
(65 counts)
(64 counts)
(65 counts)
(64 counts)
n=258, spread
(65 counts)
(64 counts)
n=259, spread
(65 counts)
n=259, normal
(260 counts)
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