參數(shù)資料
型號: 20-101-0434
廠商: Rabbit Semiconductor
文件頁數(shù): 29/100頁
文件大?。?/td> 0K
描述: MODULE RABBITCORE RCM2100
標準包裝: 1
系列: RabbitCore®
模塊/板類型: MPU 核心模塊
適用于相關產(chǎn)品: RCM2100
其它名稱: 316-1085
Q3722620
Q3767195
Q3781474
Q4313544
Q4356478
Q4728021
Q5065239
Q5167294
Q5250689
Q5829428
28
RabbitCore RCM2100
4.1.1 Dedicated Inputs
PB0 and PB1 are designated as inputs because the Rabbit 2000 is operating in an asyn-
chronous mode. Four of the input-only pins are located on PB2–PB5. These pins are used
for the slave port. PB2 and PB3 are slave write and slave read strobes, while PB4 and PB5
serve as slave address lines SA0 and SA1, and are used to access the slave registers (SD0–
SD7), which is the alternate assignment for parallel port A. When Port C is used as a paral-
lel port, PC1, PC3, PC5, and PC7 are inputs only. These pins can alternately be selectively
enabled to serve as the serial data inputs for Serial Ports D, C, B, and A.
4.1.2 Dedicated Outputs
Two of the output-only pins are located on PB6–PB7. PB7 can also be used with the slave port as the
/SLAVEATTN output. This configuration signifies that the slave is requesting attention from the
master. When Port C is used as a parallel port, PC0, PC2, PC4 and PC6 are outputs only. These pins
can alternately serve as the serial data outputs for Serial Ports D, C, B, and A.
4.1.3 Memory I/O Interface
Thirteen of the Rabbit 2000 buffered address lines (A0–A12) and all the buffered data
lines (D0–D7) are available as outputs. I/0 write (/IOWR), I/0 read (/IORD), buffer enable
(/BUFEN), and Watchdog Output (/WDO) are also available for interfacing to external
devices.
The STATUS output has three different programmable functions:
1. It can be driven low on the first op code fetch cycle.
2. It can be driven low during an interrupt acknowledge cycle.
3. It can also serve as a general-purpose output.
The output clock is available on the PCLK pin. The primary function of PCLK is as a
peripheral clock or a peripheral clock ÷ 2, but PCLK can instead be used as a digital out-
put. PCLK can also be disabled by removing R20 if there is a need to reduce radiated
emissions. Removing R20 will disable the PCLK output on pin 3 of header J1. Alterna-
tively, PCLK can be disabled in software using Dynamic C version 7.03 or later.
4.1.4 Additional I/0
Two status mode pins, SMODE0 and SMODE1, are available as inputs. The logic state of
these two pins determines the startup procedure after a reset.
/RES_IN is an external input used to reset the Rabbit 2000 microprocessor and the Rabbit-
Core RCM2100 memory. /RES_OUT is an output from the reset circuitry that can be used
to reset other peripheral devices.
相關PDF資料
PDF描述
046232103103800 CONN FFC/FPC 3POS 1MM R/A SMD
355-030-521-204 CARDEDGE 30POS DL .156 LOPRO BLK
355-030-521-202 CARDEDGE 30POS DL .156 LOPRO BLK
355-030-521-201 CARDEDGE 30POS DL .156 LOPRO BLK
355-030-520-204 CARDEDGE 30POS DL .156 LOPRO BLK
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