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參數(shù)資料
| 型號： | 20-101-0434 |
| 廠商： | Rabbit Semiconductor |
| 文件頁數(shù)： | 91/100頁 |
| 文件大小： | 0K |
| 描述： | MODULE RABBITCORE RCM2100 |
| 標準包裝： | 1 |
| 系列： | RabbitCore® |
| 模塊/板類型： | MPU 核心模塊 |
| 適用于相關產(chǎn)品： | RCM2100 |
| 其它名稱： | 316-1085 Q3722620 Q3767195 Q3781474 Q4313544 Q4356478 Q4728021 Q5065239 Q5167294 Q5250689 Q5829428 |
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84
RabbitCore RCM2100
C.2 Chip Select Circuit
The RCM2100 has provision for battery backup, which kicks in to keep VRAM from
dropping below 2 V.
The current drain on the battery in a battery-backed circuit must be kept to a minimum.
When the RCM2100 is not powered, the battery keeps the SRAM memory contents and the
real-time clock (RTC) going. The SRAM has a powerdown mode that greatly reduces power
consumption. This powerdown mode is activated by raising the chip select (CS) signal line.
Normally the SRAM requires Vcc to operate. However, only 2 V is required for data reten-
tion in powerdown mode. Thus, when power is removed from the circuit, the battery voltage
needs to be provided to both the SRAM power pin and to the CS signal line. The CS control
circuit accomplishes this task for the CS signal line.
Figure C-4 shows a schematic of the chip select circuit.
Figure C-4. Chip Select Circuit
In a powered-up condition, the CS control circuit must allow the processor’s chip select sig-
nal /CS1 to control the SRAM’s CS signal /CSRAM. So, with power applied, /CSRAM
must be the same signal as /CS1, and with power removed, /CSRAM must be held high (but
only needs to be as high as the battery voltage). Q4 and Q5 are MOSFET transistors with
opposing polarity. They are both turned on when power is applied to the circuit. They allow
the CS signal to pass from the processor to the SRAM so that the processor can periodically
access the SRAM. When power is removed from the circuit, the transistors will turn off and
isolate /CSRAM from the processor. The isolated /CSRAM line has a 100 k
pullup resistor
to VRAM (R16). This pullup resistor keeps /CSRAM at the VRAM voltage level (which
under no power condition is the backup battery’s regulated voltage at a little more than 2 V).
Transistors Q4 and Q5 are of opposite polarity so that a rail-to-rail voltages can be passed.
When the /CS1 voltage is low, Q4 will conduct. When the /CS1 voltage is high, Q5 will
conduct. It takes time for the transistors to turn on, creating a propagation delay. This
delay is typically very small, about 10 ns to 15 ns.
/CS1
/CSRAM
/RESET
Q4
Q5
R14
R16
VRAM
10 kW
100 kW
U2
R17
100 kW
C23
1 nF
1
2
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