- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371362 > 2064VE (Lattice Semiconductor Corporation) 3.3V In-System Programmable High Density SuperFAST⑩ PLD PDF資料下載
參數(shù)資料
| 型號(hào)： | 2064VE |
| 廠商： | Lattice Semiconductor Corporation |
| 英文描述： | 3.3V In-System Programmable High Density SuperFAST⑩ PLD |
| 中文描述： | 3.3在系統(tǒng)可編程高密度PLD的超快⑩ |
| 文件頁(yè)數(shù)： | 10/15頁(yè) |
| 文件大?。?/td> | 200K |
| 代理商： | 2064VE |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)當(dāng)前第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)
10
Specifications
ispLSI 2064VE
32-I/O Signal Descriptions
GOE 0/IN 3
This pin performs one of two functions. It can be programmed to function as a Global Output Enable
pin or a Dedicated Input pin.
This pin performs one of two functions. It can be programmed to function as a GLobal Output Enable or
a Dedicated Clock input. This clock input is connected to one of the clock inputs of all GLBs on the
device.
This pin performs two functions: (1) Dedicated clock input. This clock input is brought into the Clock
Deistribution Network and can optionally be routed to any GLB and/or I/O cell on the device. (2) Active
Low (0) Reset pin which resets all of the registers in the device.
Input
–
Dedicated in-system programming Boundary Scan Enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as an input pin to load
programming data into the device. TDI/IN0 is also used as one of the two control pins for the ISP State
Machine. When
BSCAN
is high, it functions as a dedicated input pin.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a pin to control the
operation of the ISP State Machine. When
BSCAN
is high, it functions as a dedicated input pin.
Output/Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as an output pin
pin to read serial shift register data. When
BSCAN
is high, it functions as a dedicated input pin.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a clock pin for the
Serial Shift Register. When
BSCAN
is high, it functions as a dedicated clock input. This clock input is
brought into the Clock Distribution Network and can optionally be routed to any GLB and/or I/O cell on
the device.
Ground (GND)
Vcc
No Connect
Input/Output pins
–
These are the general purpose I/O pins used by the logic array.
GOE 1/Y0
RESET
/Y1
BSCAN
TDI/IN 0
TMS/IN 2
TDO/IN 1
TCK/Y2
GND
VCC
NC
1
I/O
64-I/O Signal Descriptions
RESET
GOE 0, GOE1
Y0, Y1, Y2
Active Low (0) Reset pin resets all the registers in the device.
Global Output Enable input pins.
Dedicated Clock Input
–
These clock inputs are connected to one of the clock inputs of all the GLBs in
the device.
Input
–
Dedicated in-system programming Boundary Scan enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as an input pin to load
programming data into the device. TDI/IN0 is also used as one of the two control pins for the ISP State
Machine. When
BSCAN
is high, it functions as a dedicated input pin.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a clock pin for the
Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as a mode control pin for
the Boundary Scan state machine. When
BSCAN
is high, it functions as a dedicated input pin.
Output/Input
–
This pin performs two functions. When
BSCAN
is logic low, it functions as an output pin
to read serial shift register data. When
BSCAN
is high, it functions as a dedicated input pin.
Ground (GND)
Vcc
No Connect
Input/Output Pins
–
These are the general purpose I/O pins used by the logic array.
1. NC pins are not to be connected to any active signals, VCC or GND.
BSCAN
TDI/IN 0
TCK/IN 3
TMS/IN 1
TDO/IN 2
GND
VCC
NC
1
I/O
Signal Name Description
Signal Name Description
1. NC pins are not to be connected to any active signals, VCC or GND.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 2064VL | 2.5V In-System Programmable SuperFAST⑩ High Density PLD |
| 2064 | QUAD 1.5 A DARLINGTON SWITCHES |
| 20695 | AMD-K6 Processor Multimedia Technology AMD-K6 Processor Data Sheet |
| 206966-1 | CONNECTORS CIRCULAR |
| 20702 | MARKERS WHITE PM41 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 2064VE-135LB100 | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 2064VL | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:2.5V In-System Programmable SuperFAST⑩ High Density PLD |
| 2064W-BOX | 制造商:Cooper Wiring Devices 功能描述: |
| 2064WH | 制造商:Datak Corporation 功能描述: |
| 2064X | 制造商:Platt Luggage 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。